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Kangmin Lee
Ph.D. |
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Information |
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Senior System Engineer
Modem System Lab., , Telecommunication
R&D Center, Telecommunication
Network Business,
Samsung Electronics Co., LTD.,
416 Metan-3dong, Yeongtong-gu,
Suwon-Si, Gyeonggi-do,
443-742, Republic of Korea
Email: kangmin.lee@gmail.com
Homepage: http://ssl.kaist.ac.kr/~kangmin |
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| ¤ıResearch
Interest |
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- Wireless Modem Design (2G/3G/WiMAX/LTE) |
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| ¤ıEducation |
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| 2006.
2 Ph.D.
in EE, Korea Advanced Institute
of Science and Technology |
| Thesis:
Design and Implementation
of Low-Power Network-on-Chip
for Application to |
| High-Performance
System-on-Chip Design |
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| 2002.
8 M.S.
in EE, Korea Advanced Institute
of Science and Technology |
| Thesis:
Design and Implementation
of a 80Gbps Shared Bus Packet
Switch using Embedded DRAM |
| 2000.
6 Visiting
Student in CS, University
of California Berkeley (Summer
Session) |
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| 2000.
2 B.S.
in EE, Korea Advanced Institute
of Science and Technology |
| Overal GPA of 3.84 / 4.3 |
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| 1996.
2 Chungnam
Science High School |
| Graduate
with the honor of Second
rank in one year early |
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| ¤ıPublications |
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Book |
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Low-Power NoC for High-Performance SoC Design
Hoi-Jun Yoo, Kangmin Lee, and Jun-Kyoung Kim
Morgan Kaufmann, 2008 |
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Book Chapters |
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Networks on Chips: Technology and Tools - Physical Network Layer
Hoi-Jun Yoo, Kangmin Lee, and Se-Joong Lee
in G. De Micheli CRC Press, July 2006 |
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Networks on Chips: Technology and Tools - Design and Implementation of NoC-based SoCs
Hoi-Jun Yoo, Kangmin Lee, Se-Joong Lee and Kwanho Kim
in G. De Micheli CRC Press, July 2006 |
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International Journal Papers |
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Low-Power
Network-on-Chip for High-Performance
SoC Design
Kangmin Lee, Se-Joong Lee,
and Hoi-Jun Yoo
IEEE
Transactions on VLSI Systems,
Vol 14, No 2, pp. 148-160,
February 2006
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POPeye:
A Simulator for a DRAM Performance
Evaluation
Kangmin Lee, Chi-Weon Yoon,
Ramchan Woo, Jeonghoon Kook,
and Hoi-Jun Yoo
Journal
of Semiconductor Technology
and Science (Special issue
on the 2001 Korean
Conference on Semiconductors), Vol 1, No 2, pp. 116-124,
June 2001
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International Conference
Papers |
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Networks-on-chip
and Networks-in-Package
for High-Performance SoC
Platforms
Kangmin Lee, Se-Joong Lee,
Donghyun Kim, Kwanho Kim,
Gawon Kim, Joungho Kim,
and Hoi-Jun Yoo
IEEE
Asian Solid-State Circuits
Conference (A-SSCC) 2005,
Accepted for Design Contest,
pp.485-488, Nov. 2005 |
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SILENT:
Serialized Low Energy Transmission
Coding for On-Chip Interconnection
Networks
Kangmin Lee, Se-Joong Lee,
and Hoi-Jun Yoo
IEEE
International Conference
on Computer Aided Design
(ICCAD), pp. 448-451, Nov.
2004 |
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Low
Energy Transmission Coding
for On-Chip Serial Communications
Kangmin Lee, Se-Joong Lee,
and Hoi-Jun Yoo
IEEE International SOC Conference,
pp. 177-178, Sep. 2004
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51mW 1.6GHz On-Chip Network
for Low-Power Heterogeneous
SoC Platform
Kangmin Lee, Se-Joong Lee,
Sung-Eun Kim, Hye-Mi Choi,
Donghyun Kim, Sunyoung Kim,
Min-Wuk Lee
and Hoi-Jun Yoo
IEEE International Solid-State
Circuits Conference (ISSCC),
pp. 153-154, Feb, 2004 |
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Distributed On-Chip Crossbar
Switch Scheduler for On-Chip
Networks
Kangmin Lee, Se-Joong Lee,
and Hoi-Jun Yoo
IEEE Custom Integrated Circuits
Conference(CICC), pp. 671-674,
Sep. 2003. San Jose, CA |
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High-Speed and Lightweight
On-Chip Crossbar Switch
Scheduler for On-Chip Interconnection
Networks
Kangmin Lee, Se-Joong Lee,
and Hoi-Jun Yoo
IEEE European Solid State
Circuits Conference (ESSCIRC),
pp. 453-456, Sep. 2003.
Estoril,Portugal |
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10Gbps/port 8x8 Shared Bus
Switch with embedded DRAM
Hierarchical Output Buffer
Kangmin Lee, Se-Joong Lee,
and Hoi-Jun Yoo
IEEE European Solid State
Circuits Conference (ESSCIRC),
pp. 461-464, Sep. 2003.
Estoril,Portugal |
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Practical Method to use
eDRAM in the Shared Bus
Switch
Kangmin Lee, Se-Joong Lee,
and Hoi-Jun Yoo
IEEE Global Telecommunications
Conference (GLOBECOM), Vol.
1, pp. 769-772, Nov. 2002.
Taipai, Taiwan |
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A
Comparative Analysis of
a DDR-SDRAM, a D-RDRAM and
a DDR-FCRAM using a POPeye
Simulator
Kangmin Lee, Chi-Weon Yoon,
Ramchan-Woo, Jeonghoon Kook,
Ja-Il Ku, and Hoi-Jun Yoo
IEEE International Symposium
on Circuits and Systems
(ISCAS), May 6~9. 2001.
Sydney, Australia
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Domestic Conference Papers |
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POPeye:
A Simulator for a DRAM Performance
Evaluation
Kangmin Lee, Chi-Weon Yoon,
Ramchan Woo, Jeonghoon Kook,
and Hoi-Jun Yoo
Korea
Conference on Semiconductors
(KCS), Feb. 2001. Seoul |
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Awards |
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The
Outstanding Design Award
from the 1st Asian Solid-State
Circuits Conference Design
Contest
Title : Networks-on-chip
and Networks-in-package
for High-Performance SoC
Platforms |
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The
Best Design Award from Korean
Prime Minister at Korea
Layout Contest 2002 (A Prize
of $3000)
Title : Design and Implementation
of a 80Gbps Shared Bus Switch
with eDRAM |
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The
Silver Prize at 5th Korea
IC Design Contest 2004 (A
Prize of $1000)
Title: Design and Implementation
of a Multimedia SoC with
High-Performance On-Chip
Network |
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