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Wang-Joo Lee Sungmin Park Se-Jeong Park Jae-Youl Lee Jun-Kyoung Kim
Sungdae Choi Sejong Oh Jeong-Ho Woo Jerald Yoo Joo-Young Kim
Seungjin Lee Joonsung Bae Jinwook Oh Taehwan Roh Junyoung Park
Kiseok Song Gyeonghoon Kim Injoon Hong Unsoo Ha Youchang Kim
Kyuho Lee
Se-Jeong Park Yong-Ha Park Chi-Weon Yoon Ramchan Woo Se-Joong Lee
Kangmin Lee Sungdae Choi Ju-Ho Sohn Byeong-Gyu Nam Kyomin Sohn
Seong-Jun Song Jeong-Ho Woo Sunyoung Kim Donghyun Kim Namjun Cho
Kwanho Kim Hyejung Kim Jerald Yoo Joo-Young Kim Seungjin Lee
Long Yan Seulki Lee Joonsung Bae Jinwook Oh Taehwan Roh
Junyoung Park Kiseok Song Hyungwoo Lee Gyeonghoon Kim Sunjoo Hong
Hyunwoo Cho Injoon Hong Unsoo Ha Youchang Kim Kyuho Lee
Seongwook Park
Joo-Ho Lee Jae-Won Lim Jinho Han Jeonghoon Kook Jaeseo Lee
Sung-Eun Kim Jin Kyung Kim Min-Wuk Lee Jeabin Lee Yongsang Kim
Minsu Kim Binhee Kim Joonsoo Kwon Hyunki Kim Jiwoon Lee



Kwanho Kim (±è°üÈ£)

   Ph.D.

¤ıResearch Interest
-   Network-on-Chip based SoC Design
¤ıContact Information
Samsung Electronics Digital Media & Communication R&D Center
Emai: kimkh82@gmail.com
¤ıEducation
2009. 8     Ph.D. in EE, Korea Advanced Institute of Science and Technology
                    Thesis: Energy-Efficient Real-Time Object Recognition Processor with Visual Attention Engine
2006. 2     M.S. in EE, Korea Advanced Institute of Science and Technology
2004. 2     B.S. in EE, Korea Advanced Institute of Science and Technology

2000. 2     Hansung Science High School

¤ıPublications
- International Journal Papers
A Configurable Heterogeneous Multicore Architecture with Cellular Neural Network for Real-Time Object Recognition
Kwanho Kim, Seungjin Lee, Joo-Young Kim, Minsu Kim, and Hoi-Jun Yoo
IEEE Transactions on Circuits and Systems for Video Technology (TCSVT),Vol.19, No.11, pp.1612-1622, Nov. 2009
A 125 GOPS 583 mW Network-on-Chip Based Parallel Processor With Bio-Inspired Visual Attention Engine
Kwanho Kim, Seungjin Lee, Joo-Young Kim, Minsu Kim, and Hoi-Jun Yoo
IEEE Journal of Solid-State Circuits (JSSC), Vol.44, No.1, pp.136-147, Jan. 2009
- International Conference Papers
A 76.8 GB/s 46 mW Low-latency Network-on-Chip for Real-time Object Recognition Processor
Kwanho Kim, Joo-Young Kim, Seungjin Lee, Minsu Kim, and Hoi-Jun Yoo
IEEE Asian Solid-State Circuits Conference (ASSCC), pp.189-192, Nov. 2008
A 211 GOPS/W Dual-Mode Real-Time Object Recognition Processor with Network-on-Chip
Kwanho Kim, Joo-Young Kim, Seungjin Lee, Minsu Kim, and Hoi-Jun Yoo
IEEE European Solid-State Circuits Conference (ESSCIRC), 2008
A 125GOPS 583mW Network-on-Chip Based Parallel Processor with Bio-inspired Visual Attention Engine
Kwanho Kim, Seungjin Lee, Joo-Young Kim, Minsu Kim, Donghyun Kim, Jeong-Ho Woo, and Hoi-Jun Yoo
IEEE International Solid-State Circuits Conference (ISSCC), 2008
An Arbitration Look-Ahead Scheme for Reducing End-to-End Latency in Networks-on-Chip
Kwanho Kim, Se-Joong Lee, Kangmin Lee, and Hoi-Jun Yoo
IEEE International Symposium on Circuits and Systems (ISCAS), May 25, 2005

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