Recently, pattern recognition has been widely used for various applications such as robot vision system, autonomous vehicle control, surveillance camera, and wearable system control. The pattern recognition algorithm such as deep learning are characterized by complex and data-intensive computations, which make it difficult to achieve real-time performance even on today’s state-of-the-art processors. Especially, real-time performance and low-power consumption are important requirements for embedded systems. In addition, programmability is also considered to deal with various recognition targets and algorithms. Such requirements of the mobile platforms motivate our research to design real-time pattern recognition processors with low-power consumption. To achieve real-time pattern recognition, four different researches are carried out; Algorithm, Architecture, VLSI implementation, Humanistic intelligence.
  For algorithm research, we develop new pattern recognition algorithm to retain higher accuracy as well as lower computation cost than conventional works. Based on the new algorithm, a heterogeneous many-core processor is designed adopting massively parallel architecture for high throughput. After that, power and task management techniques, such as DVFS, power gating and dynamic resource management, are applied to the VLSI implementation of the processor. To realize humanistic intelligence on our SoC, we employ the way of human acts, think, and learn which overcome limitations of A.I. into our research. It consists of the machine learning algorithm, object prediction and inference, and thread optimization. These studies can be used for navigation robots, autonomous driver assistance systems, and head-mounted displays.