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Wang-Joo Lee Sungmin Park Se-Jeong Park Jae-Youl Lee Jun-Kyoung Kim
Sungdae Choi Sejong Oh Jeong-Ho Woo Jerald Yoo Joo-Young Kim
Seungjin Lee Joonsung Bae Jinwook Oh Taehwan Roh Junyoung Park
Kiseok Song Gyeonghoon Kim Injoon Hong Unsoo Ha Youchang Kim
Kyuho Lee Dongjoo Shin
Se-Jeong Park Yong-Ha Park Chi-Weon Yoon Ramchan Woo Se-Joong Lee
Kangmin Lee Sungdae Choi Ju-Ho Sohn Byeong-Gyu Nam Kyomin Sohn
Seong-Jun Song Jeong-Ho Woo Sunyoung Kim Donghyun Kim Namjun Cho
Kwanho Kim Hyejung Kim Jerald Yoo Joo-Young Kim Seungjin Lee
Long Yan Seulki Lee Joonsung Bae Jinwook Oh Taehwan Roh
Junyoung Park Kiseok Song Hyungwoo Lee Gyeonghoon Kim Sunjoo Hong
Hyunwoo Cho Injoon Hong Unsoo Ha Youchang Kim Kyuho Lee
Seongwook Park Kyeongryeol Bong Dongjoo Shin
Joo-Ho Lee Jae-Won Lim Jinho Han Jeonghoon Kook Jaeseo Lee
Sung-Eun Kim Jin Kyung Kim Min-Wuk Lee Jeabin Lee Yongsang Kim
Minsu Kim Binhee Kim Joonsoo Kwon Hyunki Kim Jiwoon Lee



Dongjoo Shin

   Ph.D.

¤ıResearch Interest
-  Multi-core Architecture
-  Network-on-Chip
-  Machine learning & Vision SoC
¤ıContact Information

#1233, Dept. of Electrical Engineering and Computer Science (E3-2)
KAIST, 373-1, Guseong-dong, Yuseong-gu, Daejeon, 305-701, Republic of Korea
Tel: +82-42-350-5468
Fax: +82-42-350-3410
Email: imdjdj@kaist.ac.kr

¤ıEducation
2018. 8       Ph.D. in EE, Korea Advanced Institute of Science and Technology
2015. 2      M.S. in EE, Korea Advanced Institute of Science and Technology
2013. 2      B.S. in EE, Korea Advanced Institute of Science and Technology
2008. 2      Kyonggi Science High School
¤ıPublications
- International Journal Papers
DNPU: An Energy-Efficient Deep Learning Processor with Heterogeneous Multi-Core Architecture
Dongjoo Shin, Jinmook Lee, Jinsu Lee, Juhyoung Lee, and Hoi-Jun Yoo
IEEE Micro, 2018, Sep. 2018
- International Conference Papers
A 1.41mW On-chip/Off-chip Hybrid Transposition Table for Low-power Robust Deep Tree Search in Artifiicial Intelligence SoCs
Dongjoo Shin, Youchang Kim, and Hoi-Jun Yoo
IEEE System-on-Chip Conference (SOCC), Sep. 2017
DNPU: An Energy-Efficient Deep Neural Network Processor with On-Chip Stereo Matching
Dongjoo Shin and Hoi-Jun Yoo
IEEE Hot Chips Symposium (HCS), Aug. 2017
An Energy-Efficient Deep Learning Processor with Heterogeneous Multi-Core Architecture for Convolutional Neural Networks and Recurrent Neural Networks
Dongjoo Shin, Jinmook Lee, Jinsu Lee, Juhyoung Lee, and Hoi-Jun Yoo
IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips), Apr. 2017
DNPU: An 8.1 TOPS/W Reconfigurable CNN-RNN Processor for General-Purpose Deep Neural Networks
Dongjoo Shin, Jinmook Lee, Jinsu Lee, and Hoi-Jun Yoo
IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2017
A 33 nJ/vector Descriptor Generation Processor for Low-power Object Recognition
Dongjoo Shin, Injoon Hong, Gyeonghoon Kim, and Hoi-Jun Yoo
IEEE Symposia on VLSI Technlogy and Circuits (SoVC), Jun. 2015
An 1.92mW Feature Reuse Engine based on Inter-frame Similarity for Low-power Object Recognition in Video Frames
Dongjoo Shin, Injoon Hong, and Hoi-Jun Yoo
IEEE International Symposium on Circuit and Systems (ISCAS), June 2014
 

#1233, School of Electrical Engineering, KAIST, 291 Daehak-ro (373-1 Guseong-dong), Yuseong-gu,
Daejeon 34141, Republic of Korea / Tel. +82-42-350-8068 / Fax. +82-42-350-3410 / Mail: sslmaster@kaist.ac.kr
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