Technology
Chip Size
Function
Nominal Frequency
Peak Performance
Power Consumption
Per-frame Efficiency
Per-pixel Efficiency
Released Date

0.13 μm 1-P 6-M Logic CMOS Technology
4.0 mm x 8.0 mm
Object Recognition
200MHz @1.2V (Digital)
342 GOPS
534mW (Peak) / 320mW (Ave.)
9.6mJ/Frame
10.5nJ/Pixel
Aug. 2011

Technology
Chip Size
Power Supply
Function
Life Time
Simulation Current
Simulation Freq.
Duty Cycle
Power Consumption
Released Date

0.13 μm 1P8M RF CMOS Technology
2.5mm x 5.0 mm (including pads)
1.2V
Multi-Modal Feedback EA Stimulation
> 1 hour
40μA ~ 1mA
1Hz ~ 500Hz
4% ~ 96%
6.8mW (@1mA EA stimulation)
Aug. 2011

Technology
Chip Size
Function
Power Supply
Operating Frequency
Power Consumption
Released Date

0.13 μm CMOS Technology
2.35 mm x 5.0 mm
Mental Health Monitoring System
1.2 V Battery Power
1 MHz
259.6 μw
Aug. 2011

Technology
Chip Size
Function
Operating Frequency Power Supply
Power Consumption
Released Date

0.13 μm SMIC 1-P 8-M CMOS Technology
6mm x 6mm
Object Recognition
200MHz (IPs) / 400MHz (NoC)
1.2V
583mW
Sep. 2007

Technology
Chip Size
Function
Sensitivity
Operating Frequency Power Supply
Power Consumption
Released Date

0.18 μm CMOS Technology
2 mm x 1.1 mm
Interference-Resilient Transceiver for Body Channel Communication
-65dBm
30 - 120 MHz
1.0/1.5 V
3.7mW
Aug. 2007

Technology
Chip Size
Power Supply
Operating Frequency
Latency Throughput
Transmission Rate
Sampling Rate
Power Consumption
Released Date

0.25 μm 1P 5M CMOS Logic Process
3 mm x 5 mm
2V
1 MHz
3-cycle, 1-cycle
1-8 Mb/s
0.1 - 1000 Samples/s
1.12 mW
Aug. 2007

Technology
Chip Size
Power Supply
Operating Frequency
Processing Speed Gate Counts
Power Consumption
Functions
Released Date

TSMC 0.25um 1P5M CMOS Technology
1560um x 1280um (Including Pads)
2.5V
10MHz
10MHz
N/A
2.87mW
Fabric Area Network Controller
Jun. 2007

Technology
Area
Power supply
Frequency
Gate Counts
Power consumption
Functions
Released Date

0.18 μm TSMC 1-P 6-M CMOS Technology
7.7mm x 5mm
1.8V
400 MHz (NoC) / 200 MHz (Other Part)
838.8K Gates (NAND2 Equiv.)
1.4W (Peak)
Vision Recognition
Dec. 2006

Technology
Area
Power supply
Frequency
Power consumption
Functions
Released Date

0.18 μm TSMC 1-P 6-M CMOS Technology
3.74mm²
0.9V
32kHz
108 μW
Digital hearing aid with ear modeling filter
Sep. 2006

Technology
Area
Power supply
Frequency
Capacity
Operation Mode



Date Rate
Power consumption
Latency
Released Date

90nm, diode-switch PRAM, 3-metal CMOS
3,085μm x 1,940μm
1.8V
100MHz
4Mb ( 256k x 16 bit )
SM : Single access mode
BM : Burst access mode
SDM : Setup and debug mode
RM : RISC Operation mode
100Mb/s/pin read and write ( in BM )
SM: 21.6mW BM: 28.4 mW
SM: 12 cycle BM: 16 cycle
Apr. 2006

Technology
Chip Size
Function
Operating Frequency Power Supply
Power Consumption
Released Date

0.18 μm DongbuAnam CMOS Technology
5 mm x 5 mm
Body-Coupled PHY Transceiver, Digital Hearing Aid
160MHz, 32kHz
0.9V, 0.9V
2.6mW, 96μW
Dec. 2005

Technology
Chip Size
Function
Memory
Operating Frequency Power Supply
Power Consumption
Released Date

0.18 μm DongbuAnam CMOS Technology
5 mm x 5 mm
Body Sensor Network management
768 Kb SRAM
4.2MHz for system bus, 8.192~32.768kHz for Sensor Management
0.6 V core, 0.6 V-1.8 V peripheral
24.2 μW avg
Dec. 2005

Technology
Chip Size
Gate Count
Function
Operating Frequency
Latency/Throughput Power Supply
Power Consumption
Released Date

0.18 μm DongbuAnam CMOS Technology
1 mm x 1 mm (core) / 4 mm x 4 mm (die, pad limited)
9 K
Logarithmic Arithmetic Unit
213 MHz
2-cycle/1-cycle
1.8 V
2.18 mW (1-operand) / 3.07 mW (2-operand)
Mar. 2005

Technology
Chip Size
Gate Count
Function


Clock Frequency
Pixel Fill Rate
Power Supply
Power Consumption
Released Date

0.18 μm DongbuAnam CMOS Technology
5 mm x 5 mm
330 KGate+164 Kb embedded SRAM
- Gouraud Shading
- Texture Mapping / Blending
- Pixel Alpha Blending
10 MHz
20 Mpixels/s
1.8 V (Core) / 3.3 V (I/O)
< 17.2 mW
Mar. 2005

Technology
Chip Size
Function


Clock Frequency


Power Supply
Power Consumption
Released Date

0.18 μm DongbuAnam CMOS Technology
2 mm x 2 mm
- Human Body Communication
- Pixel Alpha Blending
- RF Powered Sensors(Temperature and Photo Sensor)
- 1MHz (Body Channel Communication)
- 40KHz (RFID+Sensor)
- N/A (Bandgap Reference)
1 V/ 1.5-2.5 V / N/A
250 μ W/ 5 μ W / N/A
Mar. 2005

Technology
Chip Size
Function


Clock Frequency
Transistor Counts
Power Supply
Power Consumption
Released Date

0.18 μm DongbuAnam CMOS Technology
6 mm x 6 mm
- 3D Graphics Processor for Mobile Applications
- Fixed-point User-programmable Vertex Shader
- 50 Mvertices/s 50 Mpixels/s Peak Graphics
200/50 MHz for FAST Mode
2M logic, 96 Kb SRAM
1.8 V
155 mW
Oct. 2004

Technology
Chip Size
Gate Count
Function




Clock Frequency
Pixel Fill Rate
Power Supply
Power Consumption
Pin Package
Released Date

Samsung 0.18 μm 1-poly 6-metal CMOS Technology
5 mm x 5 mm (Core: 1.59 mm x 1.59 mm)
181 K
- Lighting
- Triangle Setup
- Gouraud Shading
- Texture Mapping
- Alpha Blending
20 MHz
20 Mpixels/s
1.8 V (Core) / 3.3 V (I/O)
14.7 mW
208 pin QFP
Oct. 2004

Technology
Chip Size
Function


Clock Frequency
Power Supply
Power Consumption
Released Date

0.25 μm DongbuAnam CMOS Technology
2 mm x 2 mm
- Automatic Gain Control Preamplifier with Exponential Gain Control
- PLL
- Sigma-Delta Modulator
N/A (Preamplifier) / 2 GHz (PLL) / 1/2 MHz (Modulator)
1.1 V / 2.0 V / 0.9 V
40 μ W
Sep. 2004

Technology
Chip Size
Power Supply
Operating Frequency
Processing Speed
GateCounts
Transistors
Power Consumption
Functions
Released Date

0.18 μm 1P 6M CMOS Logic Process
6 mm x6 mm
3.3V (I/O), 1.8V(Core)
200 MHz
50M Verticles/s, 50Mpixel/s (Bilinear Texture Filtering)
2M Logic Gates
96kB SRAM
< 155mW
Fixed-Point Programmable Vertex Shader
Sep. 2004

Technology
Chip Size
Density
Function

Power Supply
Released Date

Samsung 80 nm Double-Stacked Cell Technology
1152 μ m x 1728 μ m
512 Kb
- Sensing Internal Status of SRAM
- Analyzing the Data and Control Internal Parameters
1.6 V (Internal) / 3.3 V (External)
Aug. 2004

Technology
Chip Size
Function

Clock Frequency Power Supply
Power Consumption
Released Date

0.18 μm DongbuAnam CMOS Technology
5 mm x 5 mm
- A Network-on-Chip with 3Gbps/wire Serialized On-chip
  Interconnect Using Adaptive Control Schemes
400MHz input, 1.6 ~ 3.0 Gb/s/wire operation
1.8V (core), 3.3V (I/O)
N/A
May. 2004

Technology
Chip Size
Function
Clock Frequency
Power Supply
Output Voltage
Power Efficiency
Load Current
Released Date

0.13 μm Samsung 3.3 V CMOS Technology
0.5 mm x 0.5 mm
Analog Front-End Compatible with USB On-The-Go
500KHz
3.3 V
5.0 V
> 70 %
> 30 mA
Oct. 2003

Technology
Chip Size
Function
Clock Frequency

Power Supply
Power Consumption
Released Date

0.18 μm DongnuAnam CMOS Technology
5 mm x 5 mm
Multimedia SoC with Low-Power On-Chip Network
1.6 GHz for On-Chip Network
100 MHz for Processors
1.8 V (core), 3.3 V (I/O), 0.6 V (Small-swing-Interconnection)
On-Chip Network < 51 mW
Sep. 2003

Technology
Chip Size
Function




Memory Capacity
Power Supply
Search Time
Energy Efficiency
Released Date

0.10 μm Samsung CMOS Process Technology
4.2 mm x 2.8 mm
- Low Power CAM Architecture Including
- Hidden Bank Selection Scheme
- Match Line Repeater
- Sub Match Line
- Column Decoding
144 Kb
1.2 V
2.2 ns
0.7 fJ/bit/search
Aug. 2003

Technology
Chip Size
Function
Clock Frequency
Transistor Counts
Power Supply
Power Consumption
Released Date

0.16 μm Hynix CMOS DRAM Technology
6 mm x 6 mm
A MPEG-4 acceleration IP for Portable Video Application
27 MHz
~10,000
2.5 V(core), 3.3 V(I/O)
< 6 mW
Oct. 2002

Technology
Chip Size
Function

Clock Frequency

Transistor Counts
Power Supply
Power Consumption
Released Date

0.16 μm Hynix CMOS DRAM Technology
6 mm x 6 mm
- 3D Graphic Processor for Mobile Application
- 132/33 MHz for FAST mode
66/16.5 MHz for NORMAL mode
33/8.25 MHz for SLOW mode
60,000,000
2.3 V
210 mW
Oct. 2002

Technology
Chip Size
Function

Clock Frequency

Transistor Counts
Power Supply
Power Consumption
Released Date

0.16 μm DRAM Technology with 3 AI
10.8 mm x 6.0 mm
- On-chip packet transaction with plesiochronous communication
- Off-chip packet transaction for scalability
core @ 800 MHz
IP Block @ 200 MHz
81,000 (without 1 Kb SRAM)
2.3 V
264 mW
Oct. 2002

Technology
Chip Size
Function

Clock Frequency

Transistor Counts
Power Supply
Power Consumption
Released Date

0.16 μm DRAM Technology with 3 AI
4 mm x 9 mm
10 Gbps/port 8x8 Shared-bus witch fabric with Hierarchical Output
Buffer
200 MHz for Dual port SRAM
20 MHz for Embedded DRAM (w/ 512 bits I/O)
32 Kb SRAM, 1 Mb DRAM
2.3 V
240 mW
Oct. 2002

Technology

Chip Size


Function
Clock Frequency
Power Supply
Power Consumption
Released Date

0.25 μm Anam CMOS & Telephus Multichip-on-Oxide Process
Technology
5 mm x 5 mm
0.13 mm x 0.16 mm
250 μ m x 350 μ m
Transimpedance amplifier
N/A
2.5 V
27 mW @ 1 Gb/s
Aug. 2001

Technology
Chip Size
Function
Clock Frequency
Power Supply
Power Consumption
Released Date

0.16 μm HynixCMOS DRAM Technology
15.6 mm x 7.5 mm
Multilevel Parallel Texture Cache
150 MHz
2.5 V
89 mW
May. 2001

Technology
Chip Size
Function

Clock Frequency
Power Supply
Power Consumption
Released Date

0.25 μm Dongbu CMOS Technology
0.9 mm x 1.0 mm
4-Gb/s Clock and Data Recovery(CDR)
Circuit performing 1:4 DEMUX
500 MHz
2.5 V
70 mW
May. 2001

Technology
Chip Size
Function

Clock Frequency
Power Supply
Power Consumption
Released Date

0.25 μm Anam CMOS Technology
1.0 mm x 2.0 mm
2-Gb/s Clock and Data Recovery(CDR)
Circuit performing 1:2 DEMUX
1 GHz
2.5 V
100 mW
Dec. 2000

Technology
Chip Size
Function
Clock Frequency
Power Supply
Power Consumption
Released Date

0.18 μm Hynix CMOS EML Technology
84 mm²
One-Chip PDA Solution
20/80/100 MHz
1.8/2.5 V
160 mW
Jul. 2000

Technology
Chip Size
Function
Clock Frequency
Power Supply
Power Consumption
Released Date

0.25 μm Anam CMOS Technology
2.0 mm x 2.0 mm
2.5 Gb/s LVDS Transmitter for optical interconnections
N/A
2.5 V
50 mW
Feb. 2000

Technology
Chip Size
Function
Clock Frequency
Power Supply
Power Consumption
Released Date

0.25 μm Anam CMOS Technology
2.0 mm x 2.0 mm
1.3 Gb/s LVDS receiver for optical interconnections
N/A
2.5 V
51 mW
Feb. 2000

Technology
Chip Size
Function
Clock Frequency
Power Supply
Power Consumption
Released Date

0.25 μm Anam CMOS Technology
1.4 mm x 0.6 mm
Dynamic 64bit Adder
N/A
2.5 V
100 mW @ 500 MHz
Dec. 1999

Technology
Chip Size
Function
Clock Frequency
Power Supply
Power Consumption
Released Date

0.25 μm Anam CMOS Technology
0.8 mm x 0.15 mm
High-speed 64bit Adder with carry in/out
1 GHz
2.5 V
N/A
Dec. 1999

Technology
Chip Size
Function
Clock Frequency
Power Supply
Power Consumption
Released Date

0.35 μm Hynix CMOS DRAM Technology
56 mm²
EML 3D- Rendering Engine
100 MHz
3.3 V
590 mW
Aug. 1999