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Technology
Chip Size
Power Supply
Operating Frequency
Latency Throughput
Transmission Rate
Sampling Rate
Power Consumption
Released Date |
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0.25 ¥ìm 1P 5M CMOS Logic Process
3 mm x 5 mm
2V
1 MHz
3-cycle, 1-cycle
1-8 Mb/s
0.1 - 1000 Samples/s
1.12 mW
Aug. 2007 |