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DAC/ISSCC Student Design Contest Winner
2008 DAC/ISSCC Student Design Contest
Design : Vision Platform for Mobile Intelligent Robot Based on 81.6 GOPS Object Recognition Processor
Awardee : Donghyun Kim, Kwanho Kim, Joo-Young Kim, Seungjin Lee and Hoi-Jun Yoo
Outstanding Design Award
2007 3rd Asian Solid-State Circuits Conference Design Contest / November 2007
Design : A 195mW, 9.1MVertices/s Fully Programmable 3D Graphics Processor for Low Power Mobile Devices
Awardee : Jeong-Ho Woo, Ju-Ho Sohn, Hyejung Kim, Jongcheol Jeong, Euljoo Jeong, Suk Joong Lee and Hoi-Jun Yoo
DAC/ISSCC Student Design Contest Winner
2007 DAC/ISSCC Student Design Contest
Design : A 152mW/195mW Multimedia Processor with Fully Programmable 3D Graphics and MPEG/H.264/JPEG for
             Handheld Devices
Awardee : Jeong-Ho Woo, Ju-Ho Sohn, Hyejung Kim, Jongcheol Jeong, Euljoo Jeong, Suk Joong Lee and Hoi-Jun Yoo
Outstanding Design Award
The 2nd Asian Solid-State Circuits Conference Design Contest / October 2006
Design : A TCAM-based Periodic Event Generator for Multi-Node Management in the Body Sensor Network
Awardee : Sungdae Choi, Kyomin Sohn, Jooyoung Kim, Jerald Yoo and Hoi-Jun Yoo
Inovation Contest Award
International PhD Workshop on SOC / July 2006
Awardee : Byeong-Gyu Nam(2nd), Ju-Ho Sohn(3rd)
Outstanding Design Award
The 1st Asian Solid-State Circuits Conference Design Contest / November 2005
Design : Networks-on-chip and Networks-in-package for High-Performance SoC Platforms
Awardee : Kangmin Lee, Se-Joong Lee, Donghyun Kim, Kwanho Kim, Gawon Kim, Joungho Kim, and Hoi-Jun Yoo
2nd Place Award
The IDEC/KAIST Altera Programmable Logic Design Contest / October 2005
Design : A 17mW, 20Mpixels/s 3-D Rendering Processor for Portable Multimedia Application
Awardee : Jeong-Ho Woo, Min-Wuk Lee, Hyejung Kim, Ju-Ho Sohn, and Hoi-Jun Yoo
Silver Prize
The 5th Semiconductor Integrated Circuit Layout Design Contest / November 2004
Design : Design and Implementation of High Performance Network On-Chip for Multimedia SoC
Gold Prize
The 4th Semiconductor Integrated Circuit Layout Design Contest / November 2003
Design : Fast ternary content addressable memory for low power oerpation
The Best Design Award
  
The 3rd Semiconductor Integrated Circuit Layout Design Contest / November 2002
Design : Design and Implementation of a 80Gbps Shared Bus Switch with eDRAM
Best Student Paper Award
IEEE International Conference on VLSI and CAD / October 1999
Outstanding Design Award
University Design Contest of Asia South Pacific
Design Automation Conference 2001