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2016 Demonstration Session Certificate of Recognition (ISSCC 2017) / February 2017 |
Design : A 0.55V 1.1mW Artificial-Intelligence Processor with PVT Compensation for Micro Robots
Awardee : Youchang Kim, Dongjoo Shin, Jinsu Lee, Yongsu Lee, and Hoi-Jun Yoo |
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2014 Demonstration Session Certificate of Recognition (ISSCC 2016) / February 2016 |
Design : A 2.71nJ/Pixel 3D-Stacked Gaze-Activated Object-Recognition System for Low-Power Mobile HMD Applications
Awardee : Injoon Hong, Kyeongryeol Bong, Dongjoo Shin, Seongwook Park, Kyuho Lee, Youchang Kim, and Hoi-Jun Yoo |
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2014 Asian Solid-State Circuits Conference Student Design Contest / November 2014 |
Design : A 10.4mW Electrical Impedance Tomography SoC for Portable Real-time Lung Ventilation Monitoring System
Awardee : Sunjoo Hong, Jaehyuk Lee, Joonsung Bae, and Hoi-Jun Yoo |
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2011 7th Asian Solid-State Circuits Conference Student Design Contest / November 2011 |
Design : A Low Energy Crystal-Less Double-FSK Transceiver for Wireless Body-Area-Network
Awardee : Joonsung Bae, Kiseok Song, Hyungwoo Lee, Hyunwoo Cho and Hoi-Jun Yoo |
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DAC/ISSCC Student Design Contest Winner |
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2011 DAC/ISSCC Student Design Contest |
Design :Augmented Reality Headset based on a Heterogeneous Multi-core Object Recognition Chip
Awardee : Seungjin Lee, Jinwook Oh, Junyoung Park, Joonsoo Kwon and Hoi-Jun Yoo |
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2010 6th Asian Solid-State Circuits Conference Student Design Contest / November 2010 |
Design : A 92mW 76.8GOPS Vector Matching Processor with Parallel Huffman Decoder and Query Re-ordering Buffer for
Real-time Object Recognition
Awardee : Seungjin Lee, Joonsoo Kwon, Jinwook Oh, Junyoung Park and Hoi-Jun Yoo |
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DAC/ISSCC Student Design Contest Winner |
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2010 DAC/ISSCC Student Design Contest |
Design : A Real-Time Embedded Vision System with 201.4GOPS 496mW Object Recognition Processor
Awardee : Joo-Young Kim, Seungjin Lee, Minsu Kim, Jinwook Oh and Hoi-Jun Yoo |
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DAC/ISSCC Student Design Contest Winner |
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2008 DAC/ISSCC Student Design Contest |
Design : Vision Platform for Mobile Intelligent Robot Based on 81.6 GOPS Object Recognition Processor
Awardee : Donghyun Kim, Kwanho Kim, Joo-Young Kim, Seungjin Lee and Hoi-Jun Yoo |
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2007 3rd
Asian Solid-State Circuits Conference
Design Contest / November 2007 |
Design : A 195mW, 9.1MVertices/s Fully Programmable 3D Graphics Processor for Low Power Mobile Devices
Awardee : Jeong-Ho Woo, Ju-Ho Sohn, Hyejung Kim, Jongcheol Jeong, Euljoo Jeong, Suk Joong Lee and Hoi-Jun Yoo |
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DAC/ISSCC
Student Design Contest Winner |
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2007 DAC/ISSCC
Student Design Contest |
Design : A 152mW/195mW Multimedia
Processor with Fully Programmable
3D Graphics and MPEG/H.264/JPEG
for Handheld
Devices
Awardee : Jeong-Ho Woo, Ju-Ho
Sohn, Hyejung Kim, Jongcheol Jeong,
Euljoo Jeong, Suk Joong Lee and
Hoi-Jun Yoo |
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The 2nd
Asian Solid-State Circuits Conference
Design Contest / October 2006 |
Design : A TCAM-based Periodic
Event Generator for Multi-Node
Management in the Body Sensor
Network
Awardee : Sungdae Choi, Kyomin
Sohn, Jooyoung Kim, Jerald Yoo
and Hoi-Jun Yoo |
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International
PhD Workshop on SOC / July 2006 |
Awardee : Byeong-Gyu Nam(2nd),
Ju-Ho Sohn(3rd) |
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The 1st
Asian Solid-State Circuits Conference
Design Contest / November 2005 |
Design : Networks-on-chip and
Networks-in-package for High-Performance
SoC Platforms
Awardee : Kangmin Lee, Se-Joong
Lee, Donghyun Kim, Kwanho Kim,
Gawon Kim, Joungho Kim, and Hoi-Jun
Yoo |
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The IDEC/KAIST
Altera Programmable Logic Design
Contest / October 2005 |
Design : A 17mW, 20Mpixels/s
3-D Rendering Processor for Portable
Multimedia Application
Awardee : Jeong-Ho Woo, Min-Wuk
Lee, Hyejung Kim, Ju-Ho Sohn,
and Hoi-Jun Yoo |
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The 5th
Semiconductor Integrated Circuit
Layout Design Contest / November
2004 |
Design : Design and Implementation
of High Performance Network On-Chip
for Multimedia SoC |
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The 4th
Semiconductor Integrated Circuit
Layout Design Contest / November
2003 |
Design : Fast ternary content
addressable memory for low power
oerpation |
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The 3rd
Semiconductor Integrated Circuit
Layout Design Contest / November
2002 |
Design : Design and Implementation
of a 80Gbps Shared Bus Switch
with eDRAM |
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IEEE International
Conference on VLSI and CAD / October
1999 |
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University
Design Contest of Asia South Pacific |
Design Automation Conference
2001 |
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