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Kyomin Sohn (손교민)
Ph.D. |
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| ㆍResearch
Interest |
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- Synchronous SRAM Design(SPB,
NtRAM, SP, DDR, QDR..)
- Memory-intensive
SOC
- Low-power Embedded
Memory System Architecture |
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| ㆍContact
Information |
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Samsung Electronics Co., Ltd.
1-1, Samsungjeonja-ro, Hwaseong-si, Gyeonggi-do, 445-330, Koreaa
Tel: +82-31-8096-1279
Email: kyomin.sohn@samsung.com |
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| ㆍEducation |
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| 2007.
2 Ph.D.
in EE, Korea Advanced Institute
of Science and Technology |
| Thesis:
Design of Robust Memory
with Embedded RISC |
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| 1996.
8 M.S.
in Electrical Engineering,
Yonsei University |
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| 1994.
2 B.S
in Electrical Engineering,
Yonsei University |
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| ㆍWork
Experience |
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| 1996.
7 ~ 2003. 2 |
Research
Engineer in SRAM Team,
Samsung Electronics |
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| ㆍPublications |
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International Journal Papers |
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An
Autonomous SRAM With On-Chip
Sensors in an 80-nm Double
Stacked Cell Technology
Kyomin Sohn, Hyun-Sun
Mo, Young-Ho Suh, Hyun-Geun
Byun, and Hoi-Jun Yoo
IEEE
Journal of Solid-State Circuits
(JSSC), Vol. 41, No.4, pp.823-829,
Apr. 2006 |
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International Conference
Papers |
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Processor-Based Built-in Self-Optimizer for 90nm Diode-Switch PRAM
Kyomin Sohn,
Hyejung Kim, Jerald Yoo, Jeong-Ho Woo, Seung-Jin Lee, Woo-Yeong Cho, Bo-Tak Lim, Byung-Gil Choi,
Chang-Sik Kim, Choong-Keun Kwak, Chang-Hyun Kim and Hoi-Jun Yoo
IEEE
Symposium on VLSI Cirsuits(SOVC), Jun. 14~16, 2007 |
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A 0.6-V, 6.8-uW Embedded SRAM for Ultra-low Power SoC
Kyomin Sohn, Sungdae Choi, Jeong-Ho Woo, Jooyoung Kim, and Hoi-Jun Yoo
IEEE Asian Solid-State Circuits Conference(A-SSCC)2006 |
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An
Autonomous SRAM with On-Chip
Sensors in an 80-nm Double
Stacked Cell Technology
Kyomin Sohn, Namjun
Cho, Hyejung Kim, Kwanho
Kim, Hyun-Sun Mo, Young-Ho
Suh,
Hyun-Geun Byun and Hoi-Jun
Yoo
Symposium
on VLSI Circuits (SOVC),
pp. 232-235, Jun. 2005
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