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Wang-Joo Lee Sungmin Park Se-Jeong Park Jae-Youl Lee Jun-Kyoung Kim
Sungdae Choi Sejong Oh Jeong-Ho Woo Jerald Yoo Joo-Young Kim
Seungjin Lee Joonsung Bae Jinwook Oh Taehwan Roh Junyoung Park
Kiseok Song Gyeonghoon Kim Injoon Hong Unsoo Ha Youchang Kim
Kyuho Lee Dongjoo Shin
Se-Jeong Park Yong-Ha Park Chi-Weon Yoon Ramchan Woo Se-Joong Lee
Kangmin Lee Sungdae Choi Ju-Ho Sohn Byeong-Gyu Nam Kyomin Sohn
Seong-Jun Song Jeong-Ho Woo Sunyoung Kim Donghyun Kim Namjun Cho
Kwanho Kim Hyejung Kim Jerald Yoo Joo-Young Kim Seungjin Lee
Long Yan Seulki Lee Joonsung Bae Jinwook Oh Taehwan Roh
Junyoung Park Kiseok Song Hyungwoo Lee Gyeonghoon Kim Sunjoo Hong
Hyunwoo Cho Injoon Hong Unsoo Ha Youchang Kim Kyuho Lee
Seongwook Park Kyeongryeol Bong Dongjoo Shin
Joo-Ho Lee Jae-Won Lim Jinho Han Jeonghoon Kook Jaeseo Lee
Sung-Eun Kim Jin Kyung Kim Min-Wuk Lee Jeabin Lee Yongsang Kim
Minsu Kim Binhee Kim Joonsoo Kwon Hyunki Kim Jiwoon Lee



Se-Jeong Park (¹Ú¼¼Á¤)

   Ph.D.

¤ıResearch Interest
-  SOC architecture and implementation for multimedia and 3D graphics systems
    using MDL(Merged DRAM Logic) technology
-  Embedded operating systems
¤ıContact Information
MEDIABRIDGE CO.,LTD.
Rm #101, Idis Tower, 344, Pangyo-ro, Bundang-gu, Seongnam-si, Gyeonggi-do, Korea
Tel: +82-31-776-7675
Email: sjpark@mediabridge.co.kr
¤ıCareer
2006. 4 ~ C.E.O. MEDIABRIDGE Co., Ltd.
2004. 3 ~ 2006.3 Research Professor in Semiconductor System Lab. in KAIST
Responsible for developing SOC architectures for wearable computers
2002. 2 ~ 2004. 3 Principal Engineer in IDIS Co.
Responsible for developing DVR(Digital Video Recorder) systemsz
2003.2 ~ 2004.3 Developing XDR1600
2002.9 ~ 2002.12 Developing ADR1600X
2002.8 ~ 2003.8 Developing MDR4 (Mobile DVR)
2002.2 ~ 2002.12 Developing SDR40 2U
2002.2 ~ 2002.8 Developing SDR40 1U
¤ıResearch
1999. 7 ~ 2001. 6 Research on real-time 3D graphics hardware
1998.12 ~ 2001. 1 Development of Application Specific Embedded Memory Logic Design Technology
1997.1 ~ 1998.12 Development of a VDR(Video Disk Recorder) for HDTV
1996.1 ~ 1998.12 System On Silicon Project
¤ıPatents
A new 3D Graphics Texture Cache Memory Structure and its cache miss reduction technique
(10-291628-0000)
High-speed & Reliable Interface Circuit Technique for Video Disk Recorder
(10-268700-0000)
High-speed Data Bus Architecture for uncompressed HDTV Video Disk Recorder
(10-279682-0000)
¤ıPublications
- International Journal Papers
A Reconfigurable Multilevel Parallel Texture Cache Memory with 75 GB/s Parallel Cache Replacement
Bandwidth

Se-Jeong Park, Jeong-Su Kim, Ramchan Woo, Se-Joong Lee, Kang-Min Lee, Tae-Hum Yang,
Jin-Yong Jung and Hoi-Jun Yoo
IEEE Journal of Solid-State Circuits, pages 612-623, Vol. 37. No. 5, May 2002
Hidden Double Data Transfer Scheme for MDL Design [Merged DRAM Logic]
Se-Jeong Park and Hoi-Jun Yoo
IEEE Electronics Letters, Vol. 37, No. 11, pp. 676-677, May 2001
- International Conference Papers
A Reconfigurable Multilevel Parallel Graphics Cache Memory with 75 GB/s Parallel Cache
Replacement Bandwidth

Se-Jeong Park, Jeong-Su Kim, Ramchan Woo, Se-Joong Lee, Kang-Min Lee, Tae-Hum Yang, Jin-Yong Jung
and Hoi-Jun Yoo
IEEE Symposium on VLSI Circuits, Digest of Technical Papers. pp. 233-236, 2001
SOC Design Approaches Optimized for VLSI Fabrication Technologies
Se-Jeong Park, Chi-Weon Yoon and Hoi-Jun Yoo
SCI 2001/ISAS 2001, July 2001
A Video Disk Array for Uncompressed HDTV Signal
Se-Jeong Park, Joo-Young Hwang, Kyung-Ho Kim, Chang-Kyu Lee, Sung-Hoon Baek, Jee-Hee Yeo,
Jong-Hwa Lee and Kyu-Ho Park
International Workshop on HDTV-98
- Domestic Conference Papers
Nonlinear Editing System for HDTV
Se-Jeong Park, Joo-Young Hwang, Jong-Hwa Lee and Kyu-Ho Park
 

#1233, School of Electrical Engineering, KAIST, 291 Daehak-ro (373-1 Guseong-dong), Yuseong-gu,
Daejeon 34141, Republic of Korea / Tel. +82-42-350-8068 / Fax. +82-42-350-3410 / Mail: sslmaster@kaist.ac.kr
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