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Wang-Joo Lee Sungmin Park Se-Jeong Park Jae-Youl Lee Jun-Kyoung Kim
Sungdae Choi Sejong Oh Jeong-Ho Woo Jerald Yoo Joo-Young Kim
Seungjin Lee Joonsung Bae Jinwook Oh Taehwan Roh Junyoung Park
Kiseok Song Gyeonghoon Kim Injoon Hong Unsoo Ha Youchang Kim
Kyuho Lee Dongjoo Shin
Se-Jeong Park Yong-Ha Park Chi-Weon Yoon Ramchan Woo Se-Joong Lee
Kangmin Lee Sungdae Choi Ju-Ho Sohn Byeong-Gyu Nam Kyomin Sohn
Seong-Jun Song Jeong-Ho Woo Sunyoung Kim Donghyun Kim Namjun Cho
Kwanho Kim Hyejung Kim Jerald Yoo Joo-Young Kim Seungjin Lee
Long Yan Seulki Lee Joonsung Bae Jinwook Oh Taehwan Roh
Junyoung Park Kiseok Song Hyungwoo Lee Gyeonghoon Kim Sunjoo Hong
Hyunwoo Cho Injoon Hong Unsoo Ha Youchang Kim Kyuho Lee
Seongwook Park Kyeongryeol Bong Dongjoo Shin
Joo-Ho Lee Jae-Won Lim Jinho Han Jeonghoon Kook Jaeseo Lee
Sung-Eun Kim Jin Kyung Kim Min-Wuk Lee Jeabin Lee Yongsang Kim
Minsu Kim Binhee Kim Joonsoo Kwon Hyunki Kim Jiwoon Lee



Chi-Weon Yoon (윤치원)

   Ph.D.
ㆍResearch Interest
-  Flash Memory Design
ㆍContact Information

AP, SYSLSI Division, Device Solution Network Samsung Electronics Co., LTD.
San #24 Nongseo-Ri, Giheung-Eup yongin-City, Gyeonggi-Do Republic of Korea
Email: chiweon.yoon@samsung.com
ㆍPublications
- International Journal Papers
An 80/20-MHz 160-mW Multimedia Processor Integrated with Embedded DRAm, MPEG-4 Accelerator,
and 3-D Renderiing Engine for Mobile Applications
Chi-Weon Yoon, Ramchan Woo, Jeonghoon Kook, Se-Joong Lee, Kangmin Lee and Hoi-Jun Yoo
IEEE Journal of Solid-State Circuits (JSSC), Vol.36, No.11, November, 2001
Low Power Motion Estimation and Motion Compensation Block IPs in MPEG-4 Video Codec Hardware
for Portable Applications
Chi-Weon Yoon and Hoi-Jun Yoo
The Institute of Electronics, Information and Communications Engineers (IEICE),
Tr.on Electronics Vol. E86-C, No.4, April 2003
- International Conference Papers
Low power MPEG-4 Video Codec Hardware for Portale Applications
Chi-Weon Yoon and Hoi-Jun Yoo
International Symposium on Low-Power and High-Speed Chips (Coolchips-V), pp.77-89, April 2002
A 80/20MHz 160mW Multimedia Processor integrated with Embedded DRAM, MPEG-4 Accelerator,
and 3D Rendering Engine for Mobile Applications
Chi-Weon Yoon, Ramchan Woo, Jeonghoon Kook, Se-Joong Lee, Kangmin Lee, Young-Don Bae,
In-Cheol Park and Hoi-Jun Yoo
IEEE International Solid-State Circuits Conference (ISSCC), Feb. 5~8. 2001, San Fancisco
Low Power Motion Compensation Block IP with emdedded DRAM Macro for Portable Multimedia
Applications
Chi-Weon Yoon, Jeonghoon Kook, Ramchan Woo, Se-Joong Lee, Kangmin Lee and Hoi-Jun Yoo
IEEE Symposium on VLSI Circuits (SOVC), June 12~14, 2001, Kyoto, Japan
A VPM(Virtual Pipelined Memory) Achitecture for a Fast Row-Cycle DRAM
Chi-Weon Yoon, Yon-Kyun Im, Seon-Ho Han, Hoi-Jun Yoo and Tae-Sung Jung
IEEE International Conference on VLSI and CAD (ICVC), pp. 388-391, 1999

#1233, School of Electrical Engineering, KAIST, 291 Daehak-ro (373-1 Guseong-dong), Yuseong-gu,
Daejeon 34141, Republic of Korea / Tel. +82-42-350-8068 / Fax. +82-42-350-3410 / Mail: sslmaster@kaist.ac.kr
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