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   A heterogeneous multi-core processor is proposed to achieve real-time dynamic object recognition on HD 720p video streams. The context-aware visual attention model is proposed to reduce the required computing power for HD object recognition based on enhanced attention accuracy. In order to realize real-time execution of the proposed algorithm, the processor adopts a 5-stage task-level pipeline that maximizes the utilization of its 31 heterogeneous cores, comprising four simultaneous multithreading feature extraction clusters, a cache-based feature matching processor and a machine learning engine. Dynamic resource management is applied to adaptively tune thread allocation and power management during execution based on the detected amount of tasks and hardware utilization to increase energy efficiency. As a result, the 32 mm2 chip, fabricated in 0.13 µm CMOS technology, achieves 30 frame/sec with 342 8-bit GOPS peak performance and 320 mW average power dissipation, which are a 2.72 times performance improvement and 2.54 times per-pixel energy reduction compared to the previous state-of-the-art.

Implementation results

Performance comparison



  - Simultaneous Multithreading Feature Extraction Cluster (SFEC)

  - Machine Learning based Dynamic Resource Controller (DRC)

  - Massively Parallel Machine Learning Engine (MP-MLE)

Related Papers

  - ISSCC 2011 [pdf]

  - A-SSCC 2011 [pdf]

  - ISSCC 2012 [pdf]

  - COOLChips 2012 [pdf]

  - ESSCIRC 2012 [pdf]

  - A-SSCC 2012 [pdf]

  - MICRO 2012 [pdf]

  - JSSC 2013 [pdf]

  - JSSC 2013 [pdf]

  - JSSC 2013 [pdf]

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