2006
Biocle, Clearphone
Technology
Area
Power supply
Frequency
Gate Counts
Power consumption
Functions
Released Date
0.18 μm TSMC 1-P 6-M CMOS Technology
7.7mm x 5mm
1.8V
400 MHz (NoC) / 200 MHz (Other Part)
838.8K Gates (NAND2 Equiv.)
1.4W (Peak)
Vision Recognition
Dec. 2006
|
2006
Biocle, Clearphone
|
Technology
Area
Power supply
Frequency
Gate Counts
Power consumption
Functions
Released Date |
0.18 μm TSMC 1-P 6-M CMOS Technology
7.7mm x 5mm
1.8V
400 MHz (NoC) / 200 MHz (Other Part)
838.8K Gates (NAND2 Equiv.)
1.4W (Peak)
Vision Recognition
Dec. 2006 |
2006
RamP-VI
Technology
Area
Power supply
Frequency
Transistors
Processing speed
Power management
Power consumption
Functions
Released Date
0.18 μm TSMC 1-P 6-M CMOS Technology
Core: 17.2mm2 , Die: 25mm2
Core: 1.0V - 1.8V, I/O: 3.3V
89MHz - 200MHz
1.57Mtransistors, 29KB SRAM
141Mvertices/s, 50Mpixels/s
Triple power domains with DVFS
52.4mW @ 60fps
OpenGL-ES 2.0
Sep. 2006
|
2006
RamP-VI
|
Technology
Area
Power supply
Frequency
Transistors
Processing speed
Power management
Power consumption
Functions
Released Date |
0.18 μm TSMC 1-P 6-M CMOS Technology
Core: 17.2mm2 , Die: 25mm2
Core: 1.0V - 1.8V, I/O: 3.3V
89MHz - 200MHz
1.57Mtransistors, 29KB SRAM
141Mvertices/s, 50Mpixels/s
Triple power domains with DVFS
52.4mW @ 60fps
OpenGL-ES 2.0
Sep. 2006 |
2006
Clearphone+
Technology
Area
Power supply
Frequency
Power consumption
Functions
Released Date
0.18 μm TSMC 1-P 6-M CMOS Technology
3.74mm2
0.9V
32kHz
108 μW
Digital hearing aid with ear modeling filter
Sep. 2006
|
2006
Clearphone+
|
Technology
Area
Power supply
Frequency
Power consumption
Functions
Released Date |
0.18 μm TSMC 1-P 6-M CMOS Technology
3.74mm2
0.9V
32kHz
108 μW
Digital hearing aid with ear modeling filter
Sep. 2006 |
2006
μ-RamP
Technology
Area
Power supply
Frequency
Capacity
Operation Mode
Date Rate
Power consumption
Latency
Released Date
90nm, diode-switch PRAM, 3-metal CMOS
3,085μm x 1,940μm
1.8V
100MHz
4Mb ( 256k x 16 bit )
SM : Single access mode
BM : Burst access mode
SDM : Setup and debug mode
RM : RISC Operation mode
100Mb/s/pin read and write ( in BM )
SM: 21.6mW BM: 28.4 mW
SM…
|
2006
μ-RamP
|
Technology
Area
Power supply
Frequency
Capacity
Operation Mode
Date Rate
Power consumption
Latency
Released Date |
90nm, diode-switch PRAM, 3-metal CMOS
3,085μm x 1,940μm
1.8V
100MHz
4Mb ( 256k x 16 bit )
SM : Single access mode
BM : Burst access mode
SDM : Setup and debug mode
RM : RISC Operation mode
100Mb/s/pin read and write ( in BM )
SM: 21.6mW BM: 28.4 mW
SM… |