Research Interest

- Biomedical Sensor Front-end

- Wearable Healthcare System

- Mixed-mode neural network

Education

2017. 9 ~    Ph.D. in EE, Korea Advanced Institute of Science and Technology (KAIST)

2017. 8      M.S. in EE, Korea Advanced Institute of Science and Technology (KAIST)

2015. 2      B.S. in EE, Korea Advanced Institute of Science and Technology (KAIST)

2011. 2      Gyeonggi Science High School

BIOGRAPHY

- International Journal Papers

A 1.02-μW STT-MRAM-Based DNN ECG Arrhythmia Monitoring SoC With Leakage-Based Delay MAC Unit 

Kyoung-Rog Lee, Jihoon Kim, Changhyeon Kim, Donghyeon Han, Juhyoung Lee, Jinsu Lee, Hongsik Jeong, and Hoi-Jun Yoo

Solid-State Circuits Letters (SSCL), Sep. 2020

A 206.3 μW Non-contact Compensation IC for Body Channel Communication

Kyoung-Rog Lee, Jaeeun Jang, and Hoi-Jun Yoo

Journal of Semiconductor Science and Technology (JSTS)

- International Conference Papers

A 1.02 μW STT-MRAM based DNN ECG Arrhythmia Monitoring SoC with Leakage-Based Delay MAC Unit

Kyoung-Rog Lee, Jihoon Kim, Changhyeon Kim, Donghyeon Han, Juhyoung Lee, Jinsu Lee, Hongsik Jeong, and Hoi-Jun Yoo

Asian Solid-State Circuits Conference (ASSCC), Nov. 2020

A 635 μW Non-contact Compensation IC for Body Channel Communication

Kyoung-Rog Lee, Jaeeun Jang, Hyunwoo Cho, and Hoi-Jun Yoo

IEEE International Symposium on Circuit and Systems (ISCAS), May. 2016

Research Interest

- DNN Accelerator Architecture

- DNN SW/HW Co-Design

- Mobile DNN Optimization

Education

2022. 2      Ph.D. in EE, Korea Advanced Institute of Science and Technology 

2018. 2      M.S. in EE, Korea Advanced Institute of Science and Technology

2016. 2      B.S. in EE, Korea Advanced Insititue of Science and Technology

2012. 2     Goyang Foreign Language High School

Awards

BIOGRAPHY

- International Journal Papers

An Overview of Sparsity Exploitation in CNNs for On-Device Intelligence with Software-Hardware Cross-Layer Optimizations 

Sanghoon Kang, Gwangtae Park, Sangjin Kim, Soyeon Kim, Donghyeon Han and Hoi-Jun Yoo

IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), Oct. 2021

GANPU: An Energy-Efficient Multi-DNN Training Processor for GANs with Speculative Dual-Sparsity Exploitation 

Sanghoon Kang, Donghyeon Han, Juhyoung Lee, Dongseok Im, Sangyeob Kim, Soyeon Kim, Junha Ryu and Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits, 2021

Low-Power Scalable 3-D Face Frontalization Processor for CNN-based Face Recognition in Mobile Devices

Sanghoon Kang,Jinmook Lee, Kyeongryeol Bong, Changhyeon Kim, Youchang Kim, and Hoi-Jun Yoo

IEEE Journal on Emerging and Selected Topics in Circuits and Systems, Jun. 2018

- International Conference Papers

GANPU: A Versatile Many-Core Processor for Training GAN on Mobile Devices with Speculative Dual-Sparsity Exploitation

Sanghoon Kang, Donghyeon Han, Juhyoung Lee, Dongseok Im, Sangyeob Kim, Soyeon Kim, Junha Ryu, and Hoi-Jun Yoo

IEEE Hot Chips: A Symposium on High Performance Chips, Aug. 2020

GANPU: A 135TFLOPS/W Multi-DNN Training Processor for GANs with Speculative Dual Sparsity Exploitation

Sanghoon Kang, Donghyeon Han, Juhyoung Lee, Dongseok Im, Sangyeob Kim, Soyeon Kim, and Hoi-Jun Yoo

International Solid-State Circuits Conference (ISSCC), Feb. 2020

B-Face: 0.2 mW CNN-Based Face Recognition Processor with Face Alignment for Mobile User Identification

Sanghoon Kang, Jinmook Lee, Changhyeon Kim, and Hoi-jun Yoo

Symposium on VLSI Circuits (SoVC), Jun. 2018

A 0.53mW Ultra-Low-Power 3D Face Frontalization Processor for Face Recognition with Human-Level Accuracy in Wearable Devices

Sanghoon Kang, Jinmook Lee, Kyeongryeol Bong, Changhyeon Kim, Hoi-Jun Yoo

IEEE International Symposium on Circuit and Systems (ISCAS), May. 2017

Research Interest

- Low-power SoC Design

- Deep Learning & AI Algorithm

- Computer Vision & HRI System

Award

Education

2019. 3 ~   Ph.D. Student in EE, Korea Advanced Institute of Science and Technology (KAIST)

2019. 2      M.S. in EE, Korea Advanced Institute of Science and Technology (KAIST)

2017. 2      B.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2013. 2      Daejeon Science High School

BIOGRAPHY

- International Journal P​apers

Energy-efficient DNN Training Processor on Micro-AI Systems 

Donghyeon Han, Sanghoon Kang, Sangyeob Kim, Juhyoung Lee, and Hoi-Jun Yoo

IEEE Open Journal of the Solid-State Circuits Society (OJSSCS), 2022

A Mobile DNN Training Processor with Automatic Bit-precision Search and Fine-grained Sparsity Exploitation 

Donghyeon Han, Dongseok Im, Gwangtae Park, Youngwoo Kim, Seokchan Song, Juhyoung Lee, and Hoi-Jun Yoo

IEEE Micro, Dec. 2021

HNPU: An Adaptive DNN Training Processor Utilizing Stochastic Dynamic Fixed-point and Active Bit-precision Searching 

Donghyeon Han, Dongseok Im, Gwangtae Park, Youngwoo Kim, Seokchan Song, Juhyoung Lee, and Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), Sep. 2021

DF-LNPU: A Pipelined Direct Feedback Alignment-Based Deep Neural Network Learning Processor for Fast Online Learning 

Donghyeon Han, Jinsu Lee, and Hoi-jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), Dec. 2020

A Low-Power Deep Neural Network Online Learning Processor for Real-Time Object Tracking Application

Donghyeon Han, Jinsu Lee, Jinmook Lee, and Hoi-jun Yoo

IEEE Transactions on Circuits and Systems I (TCAS-I), Nov. 2018

- International Conference Papers

A Low-power Neural 3D Rendering Processor with Bio-inspired Visual Perception Core and Hybrid DNN Acceleration 

Donghyeon Han, Junha Ryu, Sangyeob Kim, Sangjin Kim, Jongjun Park and Hoi-Jun Yoo

IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips), Mar. 2023

MetaVRain: A 133mW Real-time Hyper-realistic-3D-NeRF Processor with 1D-2D Hybrid-Neural-Engines for Metaverse on Mobile Devices

Donghyeon Han, Junha Ryu, Sangyeob Kim, Sangjin Kim, and Hoi-Jun Yoo

IEEE International Conference on Solid-State Circuits (ISSCC), Feb. 2023

HNPU-V2: A 46.6 FPS DNN Training Processor for Real-World Environmental Adaptation based Robust Object Detection on Moble Devices

Donghyeon Han, Dongseok Im, Gwangtae Park, Youngwoo Kim, Seokchan Song, Juhyoung Lee, and Hoi-Jun Yoo

IEEE Symposium on High Performance Chips (HOT Chips), Aug. 2022

A 0.95mJ/frame DNN Training Processor for Robust Object Detection with Real-World Environmental Adaptation

Donghyeon Han, Dongseok Im, Gwangtae Park, Youngwoo Kim, Seokchan Song, Juhyoung Lee, and Hoi-Jun Yoo

IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), Jun. 2022

An Energy-efficient Deep Neural Network Training Processor with Bit-slice-level Reconfigurability and Sparsity Exploitation 

Donghyeon Han, Dongseok Im, Gwangtae Park, Youngwoo Kim, Seokchan Song, Juhyoung Lee, and Hoi-Jun Yoo

IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips), Apr. 2021

Direct Feedback Alignment based Convolutional Neural Network Training for Low-power Online Learning Processor 

Donghyeon Han, and Hoi-Jun Yoo

IEEE International Conference on Computer Vision (ICCVW), Nov. 2019

A 1.32 TOPS/W Energy Efficient Deep Neural Network Learning Processor with Direct Feedback Alignment based Heterogeneous Core Architecture

Donghyeon Han, Jinsu Lee, Jinmook Lee, and Hoi-Jun Yoo

IEEE Symposium on VLSI Circuits (S. VLSI), Jun. 2019

A 141.4 mW Low-Power Online Deep Neural Network Training Processor for Real-time Object Tracking in Mobile Devices

Donghyeon Han, Jinsu Lee, Jinmook Lee, Sungpill Choi, and Hoi-jun Yoo

IEEE International Symposium on Circuit and Systems (ISCAS), May. 2018

Research Interest

- Machine learning based SoC Design

Education

2019. 3 ~   Ph.D. Student in EE, Korea Advanced Institute of Science and Technology (KAIST)

2019. 2      M.S. in EE, Korea Advanced Institute of Science and Technology (KAIST)

2017. 2      B.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2013. 2      Daegu Il Science High School

BIOGRAPHY

- International Journal P​apers

OmniDRL: An Energy-Efficient Deep Reinforcement Learning Processor with Dual-mode Weight Compression and Sparse Weight Transposer

Juhyoung Lee, Sangyeob Kim, Sangjin Kim, Wooyoung Jo, Donghyeon Han, and Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), Jan. 2022

ECIM: Exponent Computing in Memory for an Energy Efficient Heterogeneous Floating-Point DNN Training Processor

Juhyoung Lee, Jihoon Kim, Wooyoung Jo, Sangyeob Kim, Sangjin Kim, and Hoi-Jun Yoo

IEEE Micro, Jul. 2021

SRNPU: An Energy-Efficient CNN-Based Super-Resolution Processor With Tile-Based Selective Super-Resolution in Mobile Devices

Juhyoung Lee, Jinsu Lee, and Hoi-Jun Yoo

IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), Aug. 2020

- International Conference Papers

Low-power Autonomous Adaptation System with Deep Reinforcement Learning

Juhyoung Lee, Wooyoung Jo, Seong-Wook Park, and Hoi-Jun Yoo

IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), Jun. 2022

OmniDRL: An Energy-Efficient Mobile Deep Reinforcement Learning Accelerators with Dual-mode Weight Compression and Direct Processing of Compressed Data 

Juhyoung Lee, Sangyeob Kim, Jihoon Kim, Sangjin Kim, Wooyoung Jo, Donghyeon Han, and Hoi-Jun Yoo

IEEE Symposium on High Performance Chips (HOT Chips), Aug. 2021

An Energy-efficient Floating-Point DNN Processor using Heterogeneous Computing Architecture with Exponent-Computing-in-Memory 

Juhyoung Lee, Jihoon Kim, Wooyoung Jo, Sangyeob Kim, Sangjin Kim, Donghyeon Han, Jinsu Lee, and Hoi-Jun Yoo

IEEE Symposium on High Performance Chips (HOT Chips), Aug. 2021

Energy-Efficient Deep Reinforcement Learning Accelerator Designs for Mobile Autonomous Systems 

Juhyoung Lee, Changhyeon Kim, Donghyeon Han, Sangyeob Kim, Sangjin Kim, and Hoi-Jun Yoo

IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), Jun. 2021

A 13.7 TFLOPS/W Floating-point DNN Processor using Heterogeneous Computing Architecture with Exponent-Computing-in-Memory

Juhyoung Lee, Jihoon Kim, Wooyoung Jo, Sangyeob Kim, Sangjin Kim, Jinsu Lee, and Hoi-Jun Yoo

IEEE Symposium on VLSI Circuits (S. VLSI), Jun. 2021

OmniDRL: A 29.3 TFLOPS/W Deep Reinforcement Learning Processor with Dual-mode Weight Compression and On-chip Sparse Weight Transposer 

Juhyoung Lee, Sangyeob Kim, Sangjin Kim, Wooyoung Jo, Donghyeon Han, Jinsu Lee, and Hoi-Jun Yoo

IEEE Symposium on VLSI Circuits (S. VLSI), Jun. 2021

A Full HD 60 fps CNN Super Resolution Processor with Selective Caching based Layer Fusion for Mobile Devices

Juhyoung Lee, Dongjoo Shin, Jinsu Lee, Jinmook Lee, Sanghoon Kang, and Hoi-Jun Yoo

IEEE Symposium on VLSI Circuits (S. VLSI), Jun. 2019

A 46.1 fps Global Matching Optical Flow Estimation Processor for Action Recognition in Mobile Devices

Juhyoung Lee, Changhyeon Kim, Sungpill Choi, Dongjoo Shin, Sanghoon Kang, and Hoi-jun Yoo

IEEE International Symposium on Circuit and Systems (ISCAS), May. 2018

Research Interest

- Energy-efficient Deep Learning SoC Design

- Intelligent Vision System Development

Education

2023. 8      Ph.D. Student in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2020. 2      M.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2018. 2      B.S. in EE, POSTECH

2014. 2      Jamsil High School

BIOGRAPHY

- International Journal Papers   

A Mobile 3D Object Recognition Processor with Deep Learning-based Monocular Depth Estimation

Dongseok Im, Gwangtae Park, Zhiyong Li, Junha Ryu, Sanghoon Kang, Donghyeon Han, Jinsu Lee, Wonhoon Park, Hankyul Kwon, and Hoi-Jun Yoo

IEEE MICRO, Mar. 2023

DSPU: An Efficient Deep Learning-Based Dense RGB-D Data Acquisition with Sensor Fusion and 3-D Perception SoC  

Dongseok Im, Gwangtae Park, Junha Ryu, Zhiyong Li, Sanghoon Kang, Donghyeon Han, Junsu Lee, Wonhoon Park, Hankyul Kwon, and Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), 2022

A Pipelined Point Cloud based Neural Network Processor for 3D Vision with Large-scale Max Pooling Layer Prediction

Dongseok Im, Donghyeon Han, Sanghoon Kang, and Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), Jun. 2021

DT-CNN: An Energy-Efficient Dilated and Transposed Convolutional Neural Network Processor for Region of Interest Based Image Segmentation 

Dongseok Im, Donghyeon Han, Sungpill Choi, Sanghoon Kang, and Hoi-Jun Yoo

IEEE Transactions on Circuits and Systems I (TCAS-1), May. 2020

- International Conference Papers

CamPU: A Multi-Camera Processing Unit for Deep Learning-based 3D Spatial Computing Systems 

Dongseok Im, Hoi-Jun Yoo

IEEE/ACM International Symposium on Microarchitecture (MICRO), Nov. 2024

LUTein: Dense-Sparse Bit-slice Architecture with Radix-4 LUT-based Slice-Tensor Processing Units 

Dongseok Im, Hoi-Jun Yoo

IEEE International Symposium on High-Performance Computer Architecture (HPCA), Jan. 2024

Sibia: Signed Bit-slice Architecture for Dense DNN Acceleration with Slice-level Sparsity Exploitation 

Dongseok Im, Gwangtae Park, Zhiyong Li, Junha Ryu, and Hoi-Jun Yoo

IEEE International Symposium on High-Performance Computer Architecture (HPCA), Feb. 2023

DSPU: A 281.6mW Real-Time Deep Learning- Based Dense RGB-D Data Acquisition with Sensor Fusion and 3D Perception System-on-Chip  

Dongseok Im, Gwangtae Park, Junha Ryu, Zhiyong Li, Sanghoon Kang, Donghyeon Han, Jinsu Lee, Wonhoon Park, Hankyul Kwon, and Hoi-Jun Yoo

IEEE Symposium on High Performance Chips (HOT Chips), Aug. 2022

​A Low-power and Real-time 3D Object Recognition Processor with Dense RGB-D Data Acquisition in Mobile Platforms 

Dongseok Im, Gwangtae Park, Junha Ryu, Zhiyong Li, Sanghoon Kang, Donghyeon Han, Jinsu Lee, Wonhoon Park, Hankyul Kwon, and Hoi-Jun Yoo

IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips), Apr. 2022

​DSPU: A 281.6mW Real-Time Depth Signal Processing Unit for Deep Learning- Based Dense RGB-D Data Acquisition with Depth Fusion and 3D Bounding Box Extraction in Mobile Platforms

Dongseok Im, Gwangtae Park, Zhiyong Li, Junha Ryu, Sanghoon Kang, Donghyeon Han, Jinsu Lee, and Hoi-Jun Yoo

International Solid-State Circuits Conference (ISSCC), Feb. 2022

A 4.45 ms Low-latency 3D Point-cloud-based Neural Network Processor for Hand Pose Estimation in Immersive Wearable Devices 

Dongseok Im, Sanghoon Kang, Donghyeon Han, Sungpill Choi, and Hoi-Jun Yoo

Symposium on VLSI Circuits (S. VLSI), Jun. 2020

DT-CNN: Dilated and Transposed Convolution Neural Network Accelerator for Real-time Image Segmentation on Mobile Devices 

Dongseok Im, Donghyeon Han, Sungpill Choi, Sanghoon Kang, and Hoi-Jun Yoo

IEEE International Symposium on Circuit and Systems (ISCAS), May. 2019

Research Interest

- Deep Learning & AI Algorithm

- Machine Learning based SoC Design

Education

2023. 8      Ph.D. Student in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2020. 2      M.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2018. 2      B.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2014. 2      Kyongbuk Science High School

BIOGRAPHY

- International Journal Papers  

C-Transformer: An Energy-Efficient Homogeneous DNN-Transformer/Spiking-Transformer Processor for Language Models

Sangyeob Kim, Sangjin Kim, Wooyoung Jo, Soyeon Kim, Seongyon Hong, Nayeong Lee, Jungwan Lee, Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), 2025

C-DNN: An Energy-Efficient Complementary Deep-Neural-Network Processor With Heterogeneous CNN/SNN Core Architecture

Sangyeob Kim, Soyeon Kim, Seongyon Hong, Sangjin Kim, Donghyeon Han, Jiwon Choi and Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), Nov. 2023

COOL-NPU: Complementary Online Learning Neural Processing Unit

Sangyeob Kim, Soyeon Kim, Seongyon Hong, Sangjin Kim, Jiwon Choi, Donghyeon Han, and Hoi-Jun Yoo

IEEE MICRO, Nov. 2023

C-DNN V2: Complementary Deep-Neural-Network Processor with Full-Adder/OR-based Reduction Tree and Reconfigurable Spatial Weight Reuse

Sangyeob Kim, and Hoi-Jun Yoo

IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), Oct. 2023

Neuro-CIM: ADC-less Neuromorphic Computing-in-Memory Processor with Operation Gating/Stopping and Digital-Analog Networks

Sangyeob Kim, Sangjin Kim, Soyeon Um, Sangjin Kim, Kwantae Kim and Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), Apr. 2023

SNPU: An Energy-Efficient Spike Domain Deep-Neural-Network Processor with Two-step Spike Encoding and Shift-and-Accumulation Unit

Sangyeob Kim, Sangjin Kim, Soyeon Um, Sangjin Kim, Juhyoung Lee and Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), Apr. 2023

TSUNAMI: Triple Sparsity-aware Ultra Energy-efficient Neural Network Training Accelerator with Multi-modal Iterative Pruning 

Sangyeob Kim, Juhyoung Lee, Sanghoon Kang, Donghyeon Han, Wooyoung Jo, and Hoi-Jun Yoo

IEEE Transactions on Circuits and Systems I (TCAS-1), Jan. 2022

PNPU: An Energy-Efficient Deep-Neural-Network Learning Processor With Stochastic Coarse–Fine Level Weight Pruning and Adaptive Input/Output/Weight Zero Skipping

Sangyeob Kim, Juhyoung Lee, Sanghoon Kang, Jinmook Lee, Wooyoung Jo, and Hoi-Jun Yoo

IEEE Solid-State Circuits Letters (SSCL), Dec. 2020

A Power-Efficient CNN Accelerator With Similar Feature Skipping for Face Recognition in Mobile Devices 

Sangyeob Kim, Juhyoung Lee, Sanghoon Kang, Jinsu Lee, and Hoi-Jun Yoo

IEEE Transactions on Circuits and Systems I (TCAS-1), Jan. 2020

- International Conference Papers

Slim-Llama: A 4.69mW Large-Language-Model Processor with Binary/Ternary Weights for Billion-Parameter Llama Model 

Sangyeob Kim, Jungwan Lee, and Hoi-Jun Yoo

IEEE International Conference on Solid-State Circuits (ISSCC), Feb. 2025

A Low-power Large-Language-Model Processor with Big-Little Network and Implicit-Weight-Generation for On-device AI 

Sangyeob Kim, Sangjin Kim, Wooyoung Jo, Soyeon Kim, Seongyon Hong, Nayeong Lee and Hoi-Jun Yoo

IEEE Symposium on High Performance Chips (HOT Chips), May. 2024

Two-Step Spike Encoding Scheme and Architecture for Highly Sparse Spiking-Neural-Network

Sangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, and Hoi-Jun Yoo

IEEE International Symposium on Circuits and Systems (ISCAS), May. 2024

C-Transformer: A 2.6-18.1μJ/Token Homogeneous DNN-Transformer/Spiking-Transformer Processor with Big-Little Network and Implicit Weight Generation for Large Language Models

Sangyeob Kim, Sangjin Kim, Wooyoung Jo, Soyeon Kim, Seongyon Hong, and Hoi-Jun Yoo

IEEE International Conference on Solid-State Circuits (ISSCC), Feb. 2024

COOL-NPU: Complementary Online Learning Neural Processing Unit with CNN-SNN Heterogeneous Core and Event-driven Backpropagation

Sangyeob Kim, Soyeon Kim, Seongyon Hong, Sangjin Kim, Donghyeon Han, Jiwon Choi, and Hoi-Jun Yoo

IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips), Mar. 2023

C-DNN: A 24.5-to-85.8TOPS/W Complementary-Deep-Neural-Network Processor with Heterogeneous CNN/SNN Core Architecture and Forward-Gradient-based Sparsity Generation

Sangyeob Kim, Soyeon Kim, Seongyon Hong, Sangjin Kim, Donghyeon Han, and Hoi-Jun Yoo

IEEE International Conference on Solid-State Circuits (ISSCC), Feb. 2023

SNPU: Always-on 63.2uW Face Recognition Spike Domain Convolutional Neural Network Processor with Spike Train Decomposition and Shift-and-Accumulation

Sangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, Juhyoung Lee, and Hoi-Jun Yoo

IEEE Asian Solid-State Circuits Conference (A-SSCC), Nov. 2022

Neuro-CIM: A 310.4TOPS/W Neuromorphic Computing-in-Memory Processor with Low WL/BL activity and Digital-Analog Mixed-mode Neuron Firing 

Sangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, Kwantae Kim, and Hoi-Jun Yoo

IEEE Symposium on High Performance Chips (HOT Chips), Aug. 2022

Neuro-CIM: A 310.4TOPS/W Neuromorphic Computing-in-Memory Processor with Low WL/BL activity and Digital-Analog Mixed-mode Neuron Firing 

Sangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, Kwantae Kim, and Hoi-Jun Yoo

Symposium on VLSI Circuits (S. VLSI), Jun. 2022

PNPU: A 146.52TOPS/W Deep-Neural-Network Learning Processor with Stochastic Coarse-Fine Pruning and Adaptive Input/Output/Weight Skipping 

Sangyeob Kim, Juhyoung Lee, Sanghoon Kang, Jinmook Lee, and Hoi-Jun Yoo

Symposium on VLSI Circuits (S. VLSI), Jun. 2020

A 15.2 TOPS/W CNN Accelerator with Similar Feature Skipping for Face Recognition in Mobile Devices

Sangyeob Kim, Juhyoung Lee, Sanghoon Kang, Jinsu Lee, and Hoi-Jun Yoo

IEEE International Symposium on Circuit and Systems (ISCAS), May. 2019