Research Interest

- Low-noise, low-power bio-potential sensor for wearable healthcare system

- Instrumentation & pre-processing of physiological signal

- Low-noise, low-power analog circuit design 

- Bio-signal processing based on signal processing & machine learning theory

Education

2020. 8      Ph.D. Student in EE, Korea Advanced Institute of Science and Technology

2014. 2      M.S. in EE, Korea Advanced Institute of Science and Technology

2012. 2      B.S. in EE, Sung Kyun Kwan University

2007. 2      Han-il High School

Work Experience

Patents

Awards

BIOGRAPHY

- International Journal Papers

Simultaneous Electrical Bio-Impedance Plethysmography at Different Body Parts: Continuous and Non-Invasive Monitoring of Pulse Wave Velocity

Kwonjoon Lee and Hoi-jun Yoo

IEEE Transaction on Biomedical Circuits and Systems (TBioCAS), Oct. 2021

Wrist Watch-type Cardiovascular Monitoring System using Concurrent ECG and APW Measurement

Kwonjoon Lee, Kiseok Song, Taehwan Roh and Hoi-jun Yoo

Journal of Semiconductor Technology and Science (JSTS), Oct. 2016

- International Conference Papers

Wrist Fabric Patch Sensor for Continuous and Comprehensive Monitoring of the Cardiovascular System  

Kwonjoon Lee, Kiseok Song, Taehwan Roh and Hoi-jun Yoo

IEEE Engineering in Medicine and Biology Society (EMBC), Aug. 2016

Research Interest

- Machine Learning Image Processing SoC Design

Education

2020. 8      Ph.D. Student in EE, Korea Advanced Institute of Science and Technology (KAIST)

2016. 8      M.S. in EE, Korea Advanced Institute of Science and Technology (KAIST)

2014. 8      B.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2010. 2      Kyunggi Science High School

BIOGRAPHY

- International Journal Papers

A CMOS Image Sensor-Based Stereo Matching Accelerator With Focal-Plane Sparse Rectification and Analog Census Transform

Changhyeon Kim, Kyeongryeol Bong, Sungpill Choi, Kyuho Jason Lee, and Hoi-Jun Yoo

IEEE Transactions on Circuits and Systems I: Regular Papers, Dec. 2016

- International Conference Papers

A 2.1TFLOPS/W Mobile Deep RL Accelerator with Transposable PE Array and Experience Compression

Changhyeon Kim, Sanghoon Kang, Donjoo Shin, Sungpill Choi, Youngwoo Kim, and Hoi-Jun Yoo

International Solid-State Circuits Conference (ISSCC), Feb. 2019 

An Ultra-Low-Power and Mixed-Mode Event-Driven Face Detection SoC for Always-on Mobile Applications

Changhyeon Kim, Kyeongryeol Bong, Injoon Hong, Kyuho Lee, Sungpill Choi, and Hoi-Jun Yoo

IEEE European Solid-State Circuits Conference (ESSCIRC), Sep. 2017

A 43.7 mW 94 fps CMOS Image Sensor-based Stereo Match-ing Accelerator with Focal-plane Rectification and Analog Census Transformation

Changhyeon Kim, Kyeongryeol Bong, Sungpill Choi, and Hoi-Jun Yoo

IEEE International Symposium on Circuit and Systems (ISCAS), May. 2016

Research Interest

- Wearable Healthcare SoC

- Biomedical Sensor Front-end

Education

2021. 2      Ph.D. Student in EE, Korea Advanced Institute of Science and Technology (KAIST)

2016. 8      M.S. in EE, Korea Advanced Institute of Science and Technology (KAIST)

2014. 8      B.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2010. 2      Korea Science Academy

BIOGRAPHY

- International Journal Papers

A 9.6-mW/Ch 10-MHz Wide-Bandwidth Electrical Impedance Tomography IC With Accurate Phase Compensation for Early Breast Cancer Detection 

Jaehyuk Lee, Surin Gweon, Kwonjoon Lee, Soyeon Um, Kyoung-Rog Lee, and Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), Nov. 2020

A 0.8-V 82.9-μW In-Ear BCI Controller IC With 8.8 PEF EEG Instrumentation Amplifier and Wireless BAN Transceiver 

Jaehyuk Lee, Kyoung-Rog Lee, Unsoo Ha, Ji-Hoon Kim, Kwonjoon Lee, Surin Gweon, Jaeeun Jang, and Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), Apr. 2018

0.025mJ/Image Fast-scan and SNR Enhanced Electrical Impedance Tomography IC for Lung Ventilation Monitoring

Jaehyuk Lee, Unsoo Ha and Hoi-Jun Yoo

Journal of Semiconductor Science and Technology (JSTS)

- International Conference Papers

A 9.6 mW/Ch 10 MHz Wide-bandwidth Electrical Impedance Tomography IC with Accurate Phase Compensation for Breast Cancer Detection 

Jaehyuk Lee, Surin Gweon, Kwonjoon Lee, Soyeon Um, Kyoung-Rog Lee, Kwantae Kim, Jihee Lee, and Hoi-Jun Yoo

Custom Integrated Circuits Conference (CICC), March, 2020

A 0.8V 82.9μW In-ear BCI Controller System with 8.8 PEF EEG Instrumentational Amplifier and Wireless BAN Transceiver

Jaehyuk Lee, Kyoung-Rog Lee, Unsoo Ha, Ji-Hoon Kim, Kwonjoon Lee, and Hoi-jun Yoo

Symposium on VLSI Circuits (SoVC), Jun. 2018

30-fps SNR Equalized Electrical Impedance Tomography IC with Fast-Settle Filter and Adaptive Current Control for Lung Monitoring

Jaehyuk Lee, Unsoo Ha, and Hoi-Jun Yoo

IEEE International Symposium on Circuit and Systems (ISCAS), May 2016

Research Interest

- Low-Power Bio-Impedance Sensor

- Digitally Assisted Analog Circuits

Education

2021. 2      Ph.D.  in EE, Korea Advanced Institute of Science and Technology (KAIST)

2017. 2      M.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2015. 2      B.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2011. 2      Gangbuk High School

BIOGRAPHY

- International Journal Papers

A 23 uW Keyword Spotting IC with Ring-Oscillator-Based Time-Domain Feature Extraction

Kwantae Kim, Chang Gao, Rui Graca, Ilya Kiselev, Hoi-Jun Yoo, Tobi Delbruck, Shih-Chii Liu

IEEE Journal of Solid-State Circuits (JSSC), 2022

Design of Sub-10-uW Sub-0.1% THD Sinusoidal Current Generator IC for Bio-Impedance Sensing

Kwantae Kim, Sangyeob Kim and Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), 2021

A 0.5 V Sub-10 μW 15.28 mΩ/√Hz Bio-Impedance Sensor IC with Sub-1° Phase Error 

Kwantae Kim, Ji-Hoon Kim, Surin Gweon, Minseo Kim, and Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), 2020

A 55.77 μW Bio-impedance Sensor with 276 μs Settling Time for Portable Blood Pressure Monitoring System

Kwantae Kim, Minseo Kim , Hyunwoo Cho , Kwonjoon Lee, and Hoi-Jun Yoo

Journal of Semiconductor Science and Technology (JSTS), 2017

- International Conference Papers

A 23μW Solar-Powered Keyword-Spotting ASIC with Ring-Oscillator-Based Time- Domain Feature Extraction

Kwantae Kim, Chang Gao, Rui Graça, Ilya Kiselev, Hoi-Jun Yoo, Tobi Delbruck, Shih-Chii Liu

International Solid-State Circuits Conference (ISSCC), Feb. 2022

A 0.5V, 6.2μW, 0.059mm² Sinusoidal Current Generator IC with 0.088% THD for Bio-Impedance Sensing 

Kwantae Kim, Changhyeon Kim, Sungpill Choi, and Hoi-Jun Yoo

Symposium on VLSI Circuits (SoVC), Jun. 2020

A 0.5V 9.26μW 15.28mΩ/√Hz Bio-Impedance Sensor IC with 0.55° Overall Phase Error

Kwantae Kim, Jihoon Kim, Surin Gweon, Jiwon Lee, Minseo Kim, Yongsu Lee, Soyeon Kim, and Hoi-Jun Yoo

International Solid-State Circuits Conference (ISSCC), Feb. 2019

A 24 μW 38.51 mΩrms Resolution Bio-Impedance Sensor with Dual Path Instrumentation Amplifier

Kwantae Kim, Kiseok Song, Kyeongryeol Bong, Jaehyuk Lee, Kwonjoon Lee, Yongsu Lee, Unsoo Ha, and Hoi-Jun Yoo

IEEE European Solid-State Circuits Conference (ESSCIRC), Sep. 2017

A 54-μW fa​st-settling arterial pulse wave sensor for wrist watch type system

Kwantae Kim, Minseo Kim, Hyunwoo Cho, Kwonjoon Lee, Seung-Tak Ryu, and Hoi-Jun Yoo

IEEE International Symposium on Circuit and Systems (ISCAS), May. 2016

Research Interest

- Machine learning based knowledge inference with robotics

- Data mining, integration and cleaning with knowledge base(graph).

Education

2019. 7       Ph.D. in Computer Science, Tsinghua University, Beijing, China

2010.07       M.S. in Computer Science, Tsinghua University, Beijing, China

2007.07       B.S. in Computer Science, Tsinghua University, Beijing, China

BIOGRAPHY

- International Conference Papers
  

Knowledge Base Error Detection with Relation Sensitive Embedding

San Kim, Xiuxing Li, Kaiyu Li, Jianhua Feng, Yan Huang, Songfan Yang

International Conference on Database Systems for Advanced Applications(DASFAA), Apr. 2019

Web Table Understanding by Collective Inference

San Kim, Guoliang Li, Jianhua Feng, Kaiyu Li

International Conference on Information and Knowledge Management(CIKM), Oct. 2018

Research Interest

- Biomedical Sensor Front-end

- Wearable Healthcare System

- Mixed-mode neural network

Education

2017. 9 ~    Ph.D. in EE, Korea Advanced Institute of Science and Technology (KAIST)

2017. 8      M.S. in EE, Korea Advanced Institute of Science and Technology (KAIST)

2015. 2      B.S. in EE, Korea Advanced Institute of Science and Technology (KAIST)

2011. 2      Gyeonggi Science High School

BIOGRAPHY

- International Journal Papers

A 1.02-μW STT-MRAM-Based DNN ECG Arrhythmia Monitoring SoC With Leakage-Based Delay MAC Unit 

Kyoung-Rog Lee, Jihoon Kim, Changhyeon Kim, Donghyeon Han, Juhyoung Lee, Jinsu Lee, Hongsik Jeong, and Hoi-Jun Yoo

Solid-State Circuits Letters (SSCL), Sep. 2020

A 206.3 μW Non-contact Compensation IC for Body Channel Communication

Kyoung-Rog Lee, Jaeeun Jang, and Hoi-Jun Yoo

Journal of Semiconductor Science and Technology (JSTS)

- International Conference Papers

A 1.02 μW STT-MRAM based DNN ECG Arrhythmia Monitoring SoC with Leakage-Based Delay MAC Unit

Kyoung-Rog Lee, Jihoon Kim, Changhyeon Kim, Donghyeon Han, Juhyoung Lee, Jinsu Lee, Hongsik Jeong, and Hoi-Jun Yoo

Asian Solid-State Circuits Conference (ASSCC), Nov. 2020

A 635 μW Non-contact Compensation IC for Body Channel Communication

Kyoung-Rog Lee, Jaeeun Jang, Hyunwoo Cho, and Hoi-Jun Yoo

IEEE International Symposium on Circuit and Systems (ISCAS), May. 2016

Research Interest

- Computer HW Architecture

- NPU HW Design

- Intelligent Vision SoC

Education

2020. 8      Ph.D. Student in EE, Korea Advanced Institute of Science and Technology (KAIST)

2017. 2      M.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2015. 2      B.S. in EE, Yonsei University

2011. 2      Daegu Science High School

Awards

BIOGRAPHY

- International Journal Papers 

The Hardware and Algorithm Co-Design for Energy-Efficient DNN Processor on Edge/Mobile Devices

Jinsu Lee, Sanghoon Kang, Jinmook Lee, Dongjoo Shin, Donghyeon Han, and Hoi-Jun Yoo

IEEE Transactions on Circuits and Systems I (TCAS-1), Sep. 2020

An Energy-Efficient Sparse Deep-Neural-Network Learning Accelerator with Fine-grained Mixed Precision of FP8-FP16
Jinsu Lee, Juhyoung Lee, Donghyeon Han, Jinmook Lee, Gwangtae Park, and Hoi-Jun Yoo

IEEE Solid-State Circuits Letters (SSCL)

A 17.5 fJ/bit Energy-efficient Analog SRAM for Mixed-signal Processing

Jinsu Lee, Dongjoo Shin, Youchang Kim, and Hoi-Jun Yoo

IEEE Transactions on Very Large Scale Integration Systems (TVLSI)

- International Conference Papers

LNPU: An Energy-Efficient Deep-Neural-Network Training Processor with Fine-Grained Mixed Precision 

Jinsu Lee, Juhyoung Lee, Donghyeon Han, Jinmook Lee, Gwangtae Park, and Hoi-Jun Yoo

IEEE Hot Chips: A Symposium on High Performance Chips, Aug. 2019

LNPU: A 25.3TFLOPS/W Sparse Deep-Neural-Network Learning Processor with Fine-Grained Mixed Precision of FP8-FP16

Jinsu Lee, Juhyoung Lee, Donghyeon Han, Jinmook Lee, Gwangtae Park, and Hoi-Jun Yoo

International Solid-State Circuits Conference (ISSCC), Feb. 2019

A 31.2pJ/disparity/pixel Stereo Matching Processor with Stereo SRAM for Mobile UI Application

Jinsu Lee, Dongjoo Shin, Kyuho Lee, and Hoi-Jun Yoo

IEEE Symposium on VLSI Circuits (SoVC), Jun 2017

A 17.5 fJ/bit Energy-efficient Analog SRAM for Mixed-signal Processing

Jinsu Lee, Dongjoo Shin, Youchang Kim, and Hoi-Jun Yoo

IEEE International Symposium on Circuit and Systems (ISCAS), May 2016

Research Interest

- RF and Mixed-mode System IC Design For T-DMB (Territorial Digital Multimedia Broadcasting) 

- Digital Broadcasting RF System 

- Analog/RF & Mixed-Mode IC Design 

- LNA, Mixer, AGC, VCO, Frequency Synthesizer Design 

- Clock & Data Recovery Circuit Design

BIOGRAPHY

- International Conference Papers

A 330MHz Low Jitter Fast Locking Direct Skew Compensation DLL

Joo-Ho Lee, Seon-Ho Han and Hoi-Jun Yoo

IEEE International Solid State Circuit Conference (ISSCC), pp. 352-353, 2000

The CMOS temperature sensor and cyclic ADC for low power single chip DTCXO

Joo-Ho Lee, Seon-Ho Han and Hoi-Jun Yoo

IEEE International Conference on VLSI and CAD (ICVC), pp. 599-601, 1999

Research Interest

- DNN Accelerator Architecture

- DNN SW/HW Co-Design

- Mobile DNN Optimization

Education

2022. 2      Ph.D. in EE, Korea Advanced Institute of Science and Technology 

2018. 2      M.S. in EE, Korea Advanced Institute of Science and Technology

2016. 2      B.S. in EE, Korea Advanced Insititue of Science and Technology

2012. 2     Goyang Foreign Language High School

Awards

BIOGRAPHY

- International Journal Papers

An Overview of Sparsity Exploitation in CNNs for On-Device Intelligence with Software-Hardware Cross-Layer Optimizations 

Sanghoon Kang, Gwangtae Park, Sangjin Kim, Soyeon Kim, Donghyeon Han and Hoi-Jun Yoo

IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), Oct. 2021

GANPU: An Energy-Efficient Multi-DNN Training Processor for GANs with Speculative Dual-Sparsity Exploitation 

Sanghoon Kang, Donghyeon Han, Juhyoung Lee, Dongseok Im, Sangyeob Kim, Soyeon Kim, Junha Ryu and Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits, 2021

Low-Power Scalable 3-D Face Frontalization Processor for CNN-based Face Recognition in Mobile Devices

Sanghoon Kang,Jinmook Lee, Kyeongryeol Bong, Changhyeon Kim, Youchang Kim, and Hoi-Jun Yoo

IEEE Journal on Emerging and Selected Topics in Circuits and Systems, Jun. 2018

- International Conference Papers

GANPU: A Versatile Many-Core Processor for Training GAN on Mobile Devices with Speculative Dual-Sparsity Exploitation

Sanghoon Kang, Donghyeon Han, Juhyoung Lee, Dongseok Im, Sangyeob Kim, Soyeon Kim, Junha Ryu, and Hoi-Jun Yoo

IEEE Hot Chips: A Symposium on High Performance Chips, Aug. 2020

GANPU: A 135TFLOPS/W Multi-DNN Training Processor for GANs with Speculative Dual Sparsity Exploitation

Sanghoon Kang, Donghyeon Han, Juhyoung Lee, Dongseok Im, Sangyeob Kim, Soyeon Kim, and Hoi-Jun Yoo

International Solid-State Circuits Conference (ISSCC), Feb. 2020

B-Face: 0.2 mW CNN-Based Face Recognition Processor with Face Alignment for Mobile User Identification

Sanghoon Kang, Jinmook Lee, Changhyeon Kim, and Hoi-jun Yoo

Symposium on VLSI Circuits (SoVC), Jun. 2018

A 0.53mW Ultra-Low-Power 3D Face Frontalization Processor for Face Recognition with Human-Level Accuracy in Wearable Devices

Sanghoon Kang, Jinmook Lee, Kyeongryeol Bong, Changhyeon Kim, Hoi-Jun Yoo

IEEE International Symposium on Circuit and Systems (ISCAS), May. 2017

Research Interest

- Low-power SoC Design

- Deep Learning & AI Algorithm

- Computer Vision & HRI System

Award

Education

2019. 3 ~   Ph.D. Student in EE, Korea Advanced Institute of Science and Technology (KAIST)

2019. 2      M.S. in EE, Korea Advanced Institute of Science and Technology (KAIST)

2017. 2      B.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2013. 2      Daejeon Science High School

BIOGRAPHY

- International Journal P​apers

Energy-efficient DNN Training Processor on Micro-AI Systems 

Donghyeon Han, Sanghoon Kang, Sangyeob Kim, Juhyoung Lee, and Hoi-Jun Yoo

IEEE Open Journal of the Solid-State Circuits Society (OJSSCS), 2022

A Mobile DNN Training Processor with Automatic Bit-precision Search and Fine-grained Sparsity Exploitation 

Donghyeon Han, Dongseok Im, Gwangtae Park, Youngwoo Kim, Seokchan Song, Juhyoung Lee, and Hoi-Jun Yoo

IEEE Micro, Dec. 2021

HNPU: An Adaptive DNN Training Processor Utilizing Stochastic Dynamic Fixed-point and Active Bit-precision Searching 

Donghyeon Han, Dongseok Im, Gwangtae Park, Youngwoo Kim, Seokchan Song, Juhyoung Lee, and Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), Sep. 2021

DF-LNPU: A Pipelined Direct Feedback Alignment-Based Deep Neural Network Learning Processor for Fast Online Learning 

Donghyeon Han, Jinsu Lee, and Hoi-jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), Dec. 2020

A Low-Power Deep Neural Network Online Learning Processor for Real-Time Object Tracking Application

Donghyeon Han, Jinsu Lee, Jinmook Lee, and Hoi-jun Yoo

IEEE Transactions on Circuits and Systems I (TCAS-I), Nov. 2018

- International Conference Papers

A Low-power Neural 3D Rendering Processor with Bio-inspired Visual Perception Core and Hybrid DNN Acceleration 

Donghyeon Han, Junha Ryu, Sangyeob Kim, Sangjin Kim, Jongjun Park and Hoi-Jun Yoo

IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips), Mar. 2023

MetaVRain: A 133mW Real-time Hyper-realistic-3D-NeRF Processor with 1D-2D Hybrid-Neural-Engines for Metaverse on Mobile Devices

Donghyeon Han, Junha Ryu, Sangyeob Kim, Sangjin Kim, and Hoi-Jun Yoo

IEEE International Conference on Solid-State Circuits (ISSCC), Feb. 2023

HNPU-V2: A 46.6 FPS DNN Training Processor for Real-World Environmental Adaptation based Robust Object Detection on Moble Devices

Donghyeon Han, Dongseok Im, Gwangtae Park, Youngwoo Kim, Seokchan Song, Juhyoung Lee, and Hoi-Jun Yoo

IEEE Symposium on High Performance Chips (HOT Chips), Aug. 2022

A 0.95mJ/frame DNN Training Processor for Robust Object Detection with Real-World Environmental Adaptation

Donghyeon Han, Dongseok Im, Gwangtae Park, Youngwoo Kim, Seokchan Song, Juhyoung Lee, and Hoi-Jun Yoo

IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), Jun. 2022

An Energy-efficient Deep Neural Network Training Processor with Bit-slice-level Reconfigurability and Sparsity Exploitation 

Donghyeon Han, Dongseok Im, Gwangtae Park, Youngwoo Kim, Seokchan Song, Juhyoung Lee, and Hoi-Jun Yoo

IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips), Apr. 2021

Direct Feedback Alignment based Convolutional Neural Network Training for Low-power Online Learning Processor 

Donghyeon Han, and Hoi-Jun Yoo

IEEE International Conference on Computer Vision (ICCVW), Nov. 2019

A 1.32 TOPS/W Energy Efficient Deep Neural Network Learning Processor with Direct Feedback Alignment based Heterogeneous Core Architecture

Donghyeon Han, Jinsu Lee, Jinmook Lee, and Hoi-Jun Yoo

IEEE Symposium on VLSI Circuits (S. VLSI), Jun. 2019

A 141.4 mW Low-Power Online Deep Neural Network Training Processor for Real-time Object Tracking in Mobile Devices

Donghyeon Han, Jinsu Lee, Jinmook Lee, Sungpill Choi, and Hoi-jun Yoo

IEEE International Symposium on Circuit and Systems (ISCAS), May. 2018

Research Interest

- Machine learning based SoC Design

Education

2019. 3 ~   Ph.D. Student in EE, Korea Advanced Institute of Science and Technology (KAIST)

2019. 2      M.S. in EE, Korea Advanced Institute of Science and Technology (KAIST)

2017. 2      B.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2013. 2      Daegu Il Science High School

BIOGRAPHY

- International Journal P​apers

OmniDRL: An Energy-Efficient Deep Reinforcement Learning Processor with Dual-mode Weight Compression and Sparse Weight Transposer

Juhyoung Lee, Sangyeob Kim, Sangjin Kim, Wooyoung Jo, Donghyeon Han, and Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), Jan. 2022

ECIM: Exponent Computing in Memory for an Energy Efficient Heterogeneous Floating-Point DNN Training Processor

Juhyoung Lee, Jihoon Kim, Wooyoung Jo, Sangyeob Kim, Sangjin Kim, and Hoi-Jun Yoo

IEEE Micro, Jul. 2021

SRNPU: An Energy-Efficient CNN-Based Super-Resolution Processor With Tile-Based Selective Super-Resolution in Mobile Devices

Juhyoung Lee, Jinsu Lee, and Hoi-Jun Yoo

IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), Aug. 2020

- International Conference Papers

Low-power Autonomous Adaptation System with Deep Reinforcement Learning

Juhyoung Lee, Wooyoung Jo, Seong-Wook Park, and Hoi-Jun Yoo

IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), Jun. 2022

OmniDRL: An Energy-Efficient Mobile Deep Reinforcement Learning Accelerators with Dual-mode Weight Compression and Direct Processing of Compressed Data 

Juhyoung Lee, Sangyeob Kim, Jihoon Kim, Sangjin Kim, Wooyoung Jo, Donghyeon Han, and Hoi-Jun Yoo

IEEE Symposium on High Performance Chips (HOT Chips), Aug. 2021

An Energy-efficient Floating-Point DNN Processor using Heterogeneous Computing Architecture with Exponent-Computing-in-Memory 

Juhyoung Lee, Jihoon Kim, Wooyoung Jo, Sangyeob Kim, Sangjin Kim, Donghyeon Han, Jinsu Lee, and Hoi-Jun Yoo

IEEE Symposium on High Performance Chips (HOT Chips), Aug. 2021

Energy-Efficient Deep Reinforcement Learning Accelerator Designs for Mobile Autonomous Systems 

Juhyoung Lee, Changhyeon Kim, Donghyeon Han, Sangyeob Kim, Sangjin Kim, and Hoi-Jun Yoo

IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), Jun. 2021

A 13.7 TFLOPS/W Floating-point DNN Processor using Heterogeneous Computing Architecture with Exponent-Computing-in-Memory

Juhyoung Lee, Jihoon Kim, Wooyoung Jo, Sangyeob Kim, Sangjin Kim, Jinsu Lee, and Hoi-Jun Yoo

IEEE Symposium on VLSI Circuits (S. VLSI), Jun. 2021

OmniDRL: A 29.3 TFLOPS/W Deep Reinforcement Learning Processor with Dual-mode Weight Compression and On-chip Sparse Weight Transposer 

Juhyoung Lee, Sangyeob Kim, Sangjin Kim, Wooyoung Jo, Donghyeon Han, Jinsu Lee, and Hoi-Jun Yoo

IEEE Symposium on VLSI Circuits (S. VLSI), Jun. 2021

A Full HD 60 fps CNN Super Resolution Processor with Selective Caching based Layer Fusion for Mobile Devices

Juhyoung Lee, Dongjoo Shin, Jinsu Lee, Jinmook Lee, Sanghoon Kang, and Hoi-Jun Yoo

IEEE Symposium on VLSI Circuits (S. VLSI), Jun. 2019

A 46.1 fps Global Matching Optical Flow Estimation Processor for Action Recognition in Mobile Devices

Juhyoung Lee, Changhyeon Kim, Sungpill Choi, Dongjoo Shin, Sanghoon Kang, and Hoi-jun Yoo

IEEE International Symposium on Circuit and Systems (ISCAS), May. 2018

Research Interest

- Energy-efficient Deep Learning SoC Design

- Intelligent Vision System Development

Education

2023. 8      Ph.D. Student in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2020. 2      M.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2018. 2      B.S. in EE, POSTECH

2014. 2      Jamsil High School

BIOGRAPHY

- International Journal Papers   

A Mobile 3D Object Recognition Processor with Deep Learning-based Monocular Depth Estimation

Dongseok Im, Gwangtae Park, Zhiyong Li, Junha Ryu, Sanghoon Kang, Donghyeon Han, Jinsu Lee, Wonhoon Park, Hankyul Kwon, and Hoi-Jun Yoo

IEEE MICRO, Mar. 2023

DSPU: An Efficient Deep Learning-Based Dense RGB-D Data Acquisition with Sensor Fusion and 3-D Perception SoC  

Dongseok Im, Gwangtae Park, Junha Ryu, Zhiyong Li, Sanghoon Kang, Donghyeon Han, Junsu Lee, Wonhoon Park, Hankyul Kwon, and Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), 2022

A Pipelined Point Cloud based Neural Network Processor for 3D Vision with Large-scale Max Pooling Layer Prediction

Dongseok Im, Donghyeon Han, Sanghoon Kang, and Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), Jun. 2021

DT-CNN: An Energy-Efficient Dilated and Transposed Convolutional Neural Network Processor for Region of Interest Based Image Segmentation 

Dongseok Im, Donghyeon Han, Sungpill Choi, Sanghoon Kang, and Hoi-Jun Yoo

IEEE Transactions on Circuits and Systems I (TCAS-1), May. 2020

- International Conference Papers

CamPU: A Multi-Camera Processing Unit for Deep Learning-based 3D Spatial Computing Systems 

Dongseok Im, Hoi-Jun Yoo

IEEE/ACM International Symposium on Microarchitecture (MICRO), Nov. 2024

LUTein: Dense-Sparse Bit-slice Architecture with Radix-4 LUT-based Slice-Tensor Processing Units 

Dongseok Im, Hoi-Jun Yoo

IEEE International Symposium on High-Performance Computer Architecture (HPCA), Jan. 2024

Sibia: Signed Bit-slice Architecture for Dense DNN Acceleration with Slice-level Sparsity Exploitation 

Dongseok Im, Gwangtae Park, Zhiyong Li, Junha Ryu, and Hoi-Jun Yoo

IEEE International Symposium on High-Performance Computer Architecture (HPCA), Feb. 2023

DSPU: A 281.6mW Real-Time Deep Learning- Based Dense RGB-D Data Acquisition with Sensor Fusion and 3D Perception System-on-Chip  

Dongseok Im, Gwangtae Park, Junha Ryu, Zhiyong Li, Sanghoon Kang, Donghyeon Han, Jinsu Lee, Wonhoon Park, Hankyul Kwon, and Hoi-Jun Yoo

IEEE Symposium on High Performance Chips (HOT Chips), Aug. 2022

​A Low-power and Real-time 3D Object Recognition Processor with Dense RGB-D Data Acquisition in Mobile Platforms 

Dongseok Im, Gwangtae Park, Junha Ryu, Zhiyong Li, Sanghoon Kang, Donghyeon Han, Jinsu Lee, Wonhoon Park, Hankyul Kwon, and Hoi-Jun Yoo

IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips), Apr. 2022

​DSPU: A 281.6mW Real-Time Depth Signal Processing Unit for Deep Learning- Based Dense RGB-D Data Acquisition with Depth Fusion and 3D Bounding Box Extraction in Mobile Platforms

Dongseok Im, Gwangtae Park, Zhiyong Li, Junha Ryu, Sanghoon Kang, Donghyeon Han, Jinsu Lee, and Hoi-Jun Yoo

International Solid-State Circuits Conference (ISSCC), Feb. 2022

A 4.45 ms Low-latency 3D Point-cloud-based Neural Network Processor for Hand Pose Estimation in Immersive Wearable Devices 

Dongseok Im, Sanghoon Kang, Donghyeon Han, Sungpill Choi, and Hoi-Jun Yoo

Symposium on VLSI Circuits (S. VLSI), Jun. 2020

DT-CNN: Dilated and Transposed Convolution Neural Network Accelerator for Real-time Image Segmentation on Mobile Devices 

Dongseok Im, Donghyeon Han, Sungpill Choi, Sanghoon Kang, and Hoi-Jun Yoo

IEEE International Symposium on Circuit and Systems (ISCAS), May. 2019

Research Interest

- Deep Learning & AI Algorithm

- Machine Learning based SoC Design

Education

2023. 8      Ph.D. Student in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2020. 2      M.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2018. 2      B.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2014. 2      Kyongbuk Science High School

BIOGRAPHY

- International Journal Papers  

C-Transformer: An Energy-Efficient Homogeneous DNN-Transformer/Spiking-Transformer Processor for Language Models

Sangyeob Kim, Sangjin Kim, Wooyoung Jo, Soyeon Kim, Seongyon Hong, Nayeong Lee, Jungwan Lee, Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), Apr. 2025

C-DNN: An Energy-Efficient Complementary Deep-Neural-Network Processor With Heterogeneous CNN/SNN Core Architecture

Sangyeob Kim, Soyeon Kim, Seongyon Hong, Sangjin Kim, Donghyeon Han, Jiwon Choi and Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), Nov. 2023

COOL-NPU: Complementary Online Learning Neural Processing Unit

Sangyeob Kim, Soyeon Kim, Seongyon Hong, Sangjin Kim, Jiwon Choi, Donghyeon Han, and Hoi-Jun Yoo

IEEE MICRO, Nov. 2023

C-DNN V2: Complementary Deep-Neural-Network Processor with Full-Adder/OR-based Reduction Tree and Reconfigurable Spatial Weight Reuse

Sangyeob Kim, and Hoi-Jun Yoo

IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), Oct. 2023

Neuro-CIM: ADC-less Neuromorphic Computing-in-Memory Processor with Operation Gating/Stopping and Digital-Analog Networks

Sangyeob Kim, Sangjin Kim, Soyeon Um, Sangjin Kim, Kwantae Kim and Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), Apr. 2023

SNPU: An Energy-Efficient Spike Domain Deep-Neural-Network Processor with Two-step Spike Encoding and Shift-and-Accumulation Unit

Sangyeob Kim, Sangjin Kim, Soyeon Um, Sangjin Kim, Juhyoung Lee and Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), Apr. 2023

TSUNAMI: Triple Sparsity-aware Ultra Energy-efficient Neural Network Training Accelerator with Multi-modal Iterative Pruning 

Sangyeob Kim, Juhyoung Lee, Sanghoon Kang, Donghyeon Han, Wooyoung Jo, and Hoi-Jun Yoo

IEEE Transactions on Circuits and Systems I (TCAS-1), Jan. 2022

PNPU: An Energy-Efficient Deep-Neural-Network Learning Processor With Stochastic Coarse–Fine Level Weight Pruning and Adaptive Input/Output/Weight Zero Skipping

Sangyeob Kim, Juhyoung Lee, Sanghoon Kang, Jinmook Lee, Wooyoung Jo, and Hoi-Jun Yoo

IEEE Solid-State Circuits Letters (SSCL), Dec. 2020

A Power-Efficient CNN Accelerator With Similar Feature Skipping for Face Recognition in Mobile Devices 

Sangyeob Kim, Juhyoung Lee, Sanghoon Kang, Jinsu Lee, and Hoi-Jun Yoo

IEEE Transactions on Circuits and Systems I (TCAS-1), Jan. 2020

- International Conference Papers

Slim-Llama: A 4.69mW Large-Language-Model Processor with Binary/Ternary Weights for Billion-Parameter Llama Model 

Sangyeob Kim, Jungwan Lee, and Hoi-Jun Yoo

IEEE International Conference on Solid-State Circuits (ISSCC), Feb. 2025

A Low-power Large-Language-Model Processor with Big-Little Network and Implicit-Weight-Generation for On-device AI 

Sangyeob Kim, Sangjin Kim, Wooyoung Jo, Soyeon Kim, Seongyon Hong, Nayeong Lee and Hoi-Jun Yoo

IEEE Symposium on High Performance Chips (HOT Chips), May. 2024

Two-Step Spike Encoding Scheme and Architecture for Highly Sparse Spiking-Neural-Network

Sangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, and Hoi-Jun Yoo

IEEE International Symposium on Circuits and Systems (ISCAS), May. 2024

C-Transformer: A 2.6-18.1μJ/Token Homogeneous DNN-Transformer/Spiking-Transformer Processor with Big-Little Network and Implicit Weight Generation for Large Language Models

Sangyeob Kim, Sangjin Kim, Wooyoung Jo, Soyeon Kim, Seongyon Hong, and Hoi-Jun Yoo

IEEE International Conference on Solid-State Circuits (ISSCC), Feb. 2024

COOL-NPU: Complementary Online Learning Neural Processing Unit with CNN-SNN Heterogeneous Core and Event-driven Backpropagation

Sangyeob Kim, Soyeon Kim, Seongyon Hong, Sangjin Kim, Donghyeon Han, Jiwon Choi, and Hoi-Jun Yoo

IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips), Mar. 2023

C-DNN: A 24.5-to-85.8TOPS/W Complementary-Deep-Neural-Network Processor with Heterogeneous CNN/SNN Core Architecture and Forward-Gradient-based Sparsity Generation

Sangyeob Kim, Soyeon Kim, Seongyon Hong, Sangjin Kim, Donghyeon Han, and Hoi-Jun Yoo

IEEE International Conference on Solid-State Circuits (ISSCC), Feb. 2023

SNPU: Always-on 63.2uW Face Recognition Spike Domain Convolutional Neural Network Processor with Spike Train Decomposition and Shift-and-Accumulation

Sangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, Juhyoung Lee, and Hoi-Jun Yoo

IEEE Asian Solid-State Circuits Conference (A-SSCC), Nov. 2022

Neuro-CIM: A 310.4TOPS/W Neuromorphic Computing-in-Memory Processor with Low WL/BL activity and Digital-Analog Mixed-mode Neuron Firing 

Sangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, Kwantae Kim, and Hoi-Jun Yoo

IEEE Symposium on High Performance Chips (HOT Chips), Aug. 2022

Neuro-CIM: A 310.4TOPS/W Neuromorphic Computing-in-Memory Processor with Low WL/BL activity and Digital-Analog Mixed-mode Neuron Firing 

Sangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, Kwantae Kim, and Hoi-Jun Yoo

Symposium on VLSI Circuits (S. VLSI), Jun. 2022

PNPU: A 146.52TOPS/W Deep-Neural-Network Learning Processor with Stochastic Coarse-Fine Pruning and Adaptive Input/Output/Weight Skipping 

Sangyeob Kim, Juhyoung Lee, Sanghoon Kang, Jinmook Lee, and Hoi-Jun Yoo

Symposium on VLSI Circuits (S. VLSI), Jun. 2020

A 15.2 TOPS/W CNN Accelerator with Similar Feature Skipping for Face Recognition in Mobile Devices

Sangyeob Kim, Juhyoung Lee, Sanghoon Kang, Jinsu Lee, and Hoi-Jun Yoo

IEEE International Symposium on Circuit and Systems (ISCAS), May. 2019

Research Interest

- Computing-In-Memory Processor

- Deep Learning SoC

- Neuromorphic Hardware

Education

2021. 9 ~   Ph.D. Student in EE, Korea Advanced Insititue of Science and Technology (KAIST) 

2021. 8      M.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2020. 2      B.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST) 

2015. 2      Hansung Science High School

BIOGRAPHY

- International Journal Papers

LOG-CIM: An Energy-Efficient Logarithmic Quantization Computing-In-Memory Processor with Exponential Parallel Data Mapping and Zero-Aware 6T Dual-WL Cell

Soyeon Um, Sangjin Kim, Seongyon Hong, Sangyeob Kim, and Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), May. 2024

A 3.8-mW 1.9-mΩ/√Hz Electrical Impedance Tomography IC with High Input Impedance and Loading Effect Calibration for 3-D Early Breast Cancer Detect System

Soyeon Um, Jaehyuk Lee, and Hoi-Jun Yoo 

IEEE Journal of Solid-State Circuits (JSSC), May. 2024

A 43.1TOPS/W Energy-Efficient Absolute-Difference-Accumulation Operation Computing-In-Memory with Computation Reuse 

Soyeon Um, Sangyeob Kim, Sangjin Kim, and Hoi-Jun Yoo 

IEEE Transactions on Circuits and Systems II (TCAS-II), Mar. 2021

- International Conference Papers

DIAL: An Energy-Efficient DRAM In-memory Computing Accelerator with Compact Partial Product LUT and Twisted Differential ADC

Soyeon Um, Sangwoo Ha, Sunjoo Whang, Minsung Kim, Byeongcheol Kim, Sangjin Kim, Junha Ryu, Chaeyun Jeong, Kyomin Sohn, and Hoi-Jun Yoo

IEEE Symposium on VLSI Circuits (S. VLSI), June. 2025

LOG-CIM: A 116.4 TOPS/W Digital Computing-In-Memory Processor Supporting a Wide Range of Logarithmic Quantization with Zero-Aware 6T Dual-WL Cell

Soyeon Um, Sangjin Kim, Seongyon Hong, Sangyeob Kim, and Hoi-Jun Yoo

IEEE Asian Solid-State Circuits Conference (A-SSCC), Nov. 2023

A 3.8 mW 1.9 mΩ/√Hz Electrical Impedance Tomography Imaging with 28.4 MΩ High Input Impedance and Loading Calibration

Soyeon Um, Jaehyuk Lee, and Hoi-Jun Yoo

IEEE European Solid-State Circuits Conference (ESSCIRC), Sep. 2023

A 43.1TOPS/W Energy-Efficient Absolute-Difference-Accumulation Operation Computing-In-Memory with Computation Reuse 

Soyeon Um, Sangyeob Kim, Sangjin Kim, and Hoi-Jun Yoo 

IEEE International Symposium on Circuit and Systems (ISCAS), May. 2021

Research Interest

- Deep learning SoC

- Multicore Processor Architecture

Education

2021. 9 ~   Ph.D. Student in EE, Korea Advanced Insititue of Science and Technology (KAIST) 

2021. 8      M.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2019. 8      B.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2015. 2      Chungnam Science High School

Award

BIOGRAPHY

- International Journal Papers

An Energy-Efficient GAN Accelerator with On-Chip Training for Domain Specific Optimization 

Soyeon Kim, Sanghoon Kang, Donghyeon Han, Sangjin Kim, Sangyeob Kim, and Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), Jul. 2021

A 64.1mW Accurate Real-time Visual Object Tracking Processor with Spatial Early Stopping on Siamese Network 

Soyeon Kim, Sangjin Kim, Sangyeob Kim, Donghyeon Han, and Hoi-Jun Yoo 

IEEE Transactions on Circuits and Systems II (TCAS-II), Mar. 2021

- International Conference Papers

NuVPU: A 4.8~9.6 mJ/frame Progressive NTT-based Unified Video Processor for Stable Video Streaming and Processing with Neural Video Codec

Soyeon Kim, Hankyul Kwon, Jingu Lee, Youngjin Moon, Hongseok Lee, Junha Ryu, Zhamaliddin Kalzhan, Sangyeob Kim, Wooyoung Jo, and Hoi-Jun Yoo

IEEE Symposium on VLSI Circuits (S. VLSI), June. 2025

A 64.1mW Accurate Real-time Visual Object Tracking Processor with Spatial Early Stopping on Siamese Network 

Soyeon Kim, Sangjin Kim, Sangyeob Kim, Donghyeon Han, and Hoi-Jun Yoo 

IEEE International Symposium on Circuit and Systems (ISCAS), May. 2021

An Energy-Efficient GAN Accelerator with On-chip Training for Domain Specific Optimization

Soyeon Kim, Sanghoon Kang, Donghyeon Han, Sangyeob Kim, Sangjin Kim, and Hoi-jun Yoo

Asian Solid-State Circuits Conference (ASSCC), Nov. 2020

Research Interest

- System-on-Chip Design for On-device AI

- Algorithm-Architecture Co-optimization for GenAI Model

- Memory-centric Computing Architecture

Education

2024. 2      Ph.D. in EE, Korea Advanced Insititue of Science and Technology (KAIST) 

2021. 2      M.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2019. 2      B.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2014. 2      Gwangju  Science High School

BIOGRAPHY

- International Journal Papers  

EdgeDiff: Energy-Efficient Multi-Modal Few-Step Diffusion Model Accelerator Using Mixed-Precision and Reordered Group Quantization

Sangjin Kim, Jungjun Oh, Jeonggyu So, Yuseon Choi, Sangyeob Kim, Dongseok Im, Gwangtae Park and Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), Sep. 2025

LightRot: A Light-weighted Rotation Scheme and Architecture for Accurate Low-bit Large Language Model Inference

Sangjin Kim, Yuseon Choi, Jungjun Oh, Byeongcheol Kim, and Hoi-Jun Yoo

IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), Apr. 2025

Scaling-CIM: eDRAM In-Memory-Computing Accelerator With Dynamic-Scaling ADC and Adaptive Analog Operation

Sangjin Kim, Soyeon Um, Wooyoung Jo, Jingu Lee, Sangwoo Ha, Zhiyong Li, and Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), Feb. 2024

An Overview of Computing-in-Memory Circuits With DRAM and NVM

Sangjin Kim, and Hoi-Jun Yoo

IEEE Transactions on Circuits and Systems II (TCAS-II), Nov. 2023

DynaPlasia: An eDRAM In-Memory Computing-Based Reconfigurable Spatial Accelerator With Triple-Mode Cell

Sangjin Kim, Zhiyong Li, Soyeon Um, Wooyoung Jo, Sangwoo Ha, Juhyoung Lee, Sangyeob Kim, Donghyeon Han, and Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), Oct. 2023

A Low-Power Graph Convolutional Network Processor with Sparse Grouping for 3D Point Cloud Semantic Segmentation in Mobile Devices

Sangjin Kim, Sangyeob Kim, Juhyoung Lee, and Hoi-Jun Yoo

IEEE Transactions on Circuits and Systems I (TCAS-I), Jan. 2022

- International Conference Papers

GyRot: Leveraging Hidden Synergy between Rotation and Fine-grained Group Quantization for Low-bit LLM Inference

Sangjin Kim, Yuseon Choi, Byeongcheol Kim, Jungjun Oh, Hoi-jun Yoo

IEEE International Symposium on High-Performance Computer Architecture (HPCA), Feb. 2026

Revolver: Low-Bit GenAI Accelerator for Distilled-Model and CoT with Phase-Aware-Quantization and Rotation-Based Integer-Scaled Group Quantization 

Sangjin Kim, Jungjun Oh, Byeongcheol Kim, Yuseon Choi, Gwangtae Park, Hoi-jun Yoo

IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2026

Multi-modal Few-step Diffusion Model Accelerator with Mixed-Precision and Reordered Group-Quantization for On-device Generative AI

Sangjin Kim, Jungjun Oh, Jeonggyu So, Yuseon Choi, Sangyeob Kim, Dongseok Im, Gwangtae Park, and Hoi-Jun Yoo

IEEE Symposium on High Performance Chips (HOT Chips), Aug. 2025

EdgeDiff: 418.4mJ/inference Multi-modal Few-step Diffusion Model Accelerator with Mixed-Precision and Reordered Group-Quantization 

Sangjin Kim, Jungjun Oh, Jeonggyu So, Yuseon Choi, Sangyeob Kim, Dongseok Im, Gwangtae Park and Hoi-jun Yoo

IEEE International Conference on Solid-State Circuits (ISSCC), Feb. 2025

NoPIM: Functional Network-on-Chip Architecture for Scalable High-Density Processing-in-Memory-based Accelerator 

Sangjin Kim, Zhiyong Li, Soyeon Um, Wooyoung Jo, Sangwoo Ha, Sangyeob Kim and Hoi-Jun Yoo

IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips), Apr. 2024

Scaling-CIM: An eDRAM-based In-Memory-Computing Accelerator with Dynamic-Scaling ADC for SQNR-Boosting and Layer-wise Adaptive Bit-Truncation

Sangjin Kim, Soyeon Um, Wooyoung Jo, Jingu Lee, Sangwoo Ha, Zhiyong Li and Hoi-Jun Yoo

IEEE Symposium on VLSI Circuits (S. VLSI), Apr. 2023

DynaPlasia: An eDRAM In-Memory-Computing-Based Reconfigurable Spatial Accelerator with Triple-Mode Cell for Dynamic Resource Switching

Sangjin Kim, Zhiyong Li, Soyeon Um, Wooyoung Jo, Sangwoo Ha, Juhyoung Lee, Sangyeob Kim, and Hoi-Jun Yoo

IEEE International Conference on Solid-State Circuits (ISSCC), Feb. 2023

PNNPU: A Fast and Efficient 3D Point Cloud-based Neural Network Processor with Block-based Point Processing for Regular DRAM Access 

Sangjin Kim, Juhyoung Lee, Dongseok Im, and Hoi-jun Yoo

IEEE Symposium on High Performance Chips (HOT Chips), Aug. 2021

PNNPU: A 11.9 TOPS/W High-speed 3D Point Cloud-based Neural Network Processor with Block-based Point Processing for Regular DRAM Access 

Sangjin Kim, Juhyoung Lee, Dongseok Im, and Hoi-Jun Yoo

IEEE Symposium on VLSI Circuits (S. VLSI), Jun. 2021

A 54.7 fps 3D Point Cloud Semantic Segmentation Processor with Sparse Grouping Based Dilated Graph Convolutional Network for Mobile Devices

Sangjin Kim, Sangyeob Kim, Juhyoung Lee, and Hoi-jun Yoo 

IEEE International Symposium on Circuit and Systems (ISCAS), Oct. 2020

Research Interest

-  Technology Strategy Planning in System IC Industry

BIOGRAPHY

-

Research Interest

- High Performace Memory and High-Speed I/O Design for Embedded Memory System

BIOGRAPHY

- International Conference Papers

A Low Power Reconfigurable I/O DRAM Macro with Single Bit line Writing Scheme

Jeonghoon Kook and Hoi-Jun Yoo

IEEE Proceedings of the 26th ESSCIRC, pp. 384-387, 2000

Research Interest

-  Design of high-performance mixed mode I.C.

BIOGRAPHY

- International Conference Papers

A Multichip-on-Oxide 1.0Gb/s 80dBΩ Fully-Differential CMOS Transimpedance Amplifier for Optical Interconnect Applications

Jaeseo Lee, Seong-Jun Song, Sung Min Park, Choong-Mo Nam, Young-Se Kwon, and Hoi-Jun Yoo

IEEE International Solid State Circuit Conference (ISSCC), vol.1, pp. 80-447, 2002

Design and Implementation of CMOS LVDS 2.5Gb/s Transmitter and 1.3Gb/s Receiver for Optical Interconnections

Jaeseo Lee, Jae-Won Lim, Sung-Jun Song, Sung-Sik Song, Wang-Joo Lee and Hoi-Jun Yoo

IEEE International Symposium on Circuits and Systems (ISCAS), Vol. 4, pp. 702-705, 2001

- Domestic Conference Papers

Design and Implementation of CMOS Transeiver for High Speed Interface

Jaeseo Lee, Jae-Won Lim, Sung-Jun Song, Sung-Sik Song, Wang-Joo Lee and Hoi-Jun Yoo

Korea Conference on Semiconductors (KCS)

Research Interest

-  OLED-driver circuit

-  Frequency Synthesizer 

Education

2004. 2  M.S. in EE, Korea Advanced Institute of Science and Technology

2002. 2  B.S. in Electrical & Computer Engineering, Hanyang University

BIOGRAPHY

- International Journal Papers

A Small Ripple Regulated Charge Pump with Automatic Pumping Control Schemes

Sung-Eun Kim, Seong-Jun Song, Jin Kyung Kim, Sunyoung Kim, Jae-Youl Lee, and Hoi-Jun Yoo

ESSCIRC 2004

CMOS Optical Receiver Chipset for Gigabit Ethernet Applications

Sung-Eun Kim, Seong-Jun Song, Sung Min Park and Hoi-Jun Yoo

IEEE International Symposium on Circuits and Systems (ISCAS), May 2003

Education

2004. 2 M.S. in EE, Korea Advanced Institute of Science and Technology

2002. 2 B.S. in EE, Korea Advanced Institute of Science and Technology

BIOGRAPHY

-

Research Interest

-  Mobile 3D Graphics Library Design 

-  Cache Architecture in Mobile System

Education

2005. 2     M.S. in EE, Korea Advanced Institute of Science and Technology

2003. 2     B.S. in EE, Kyungpook National University

1996. 2     Taegu Hyup-Sung High School

BIOGRAPHY

- International Conference Papers

A Fixed-Point 3D Graphics Library with Energy-Efficient Cache Architecture

Min-Wuk Lee, Byeong-Gyu Nam, Juho Sohn, Namjun Cho, Hyejung Kim, Kwanho Kim and Hoi-Jun Yoo

IEEE International Symposium on Circuits and Systems(ISCAS) 2005

Research Interest

- Open O/S H/W Platform

- 3G Multimedia Mobile Development 

Education

2008. 2     M.S. in EE, Korea Advanced Institute of Science and Technology

2006. 2     B.S. in EE, Korea Advanced Institute of Science and Technology

2002. 2     Kyonggi Science High School

BIOGRAPHY

- International Conference Papers

Dynamic Voltage and Frequency Scaling (DVFS) Scheme for Multi-Domains Power Management  

Jeabin Lee, Byeong-Gyu Nam, and Hoi-Jun Yoo

IEEE Asian Solid-State Circuits Conference(A-SSCC), pp.360-363, Nov. 2007

A Power Management Unit with Continuous Co-Locking of Clock Frequency and Supply Voltage for Dynamic Voltage and Frequency Scaling  

Jeabin Lee, Byeong-Gyu Nam, Seong-Jun Song, Namjun Cho and Hoi-Jun Yoo 

IEEE International Symposium on Circuits and Systems(ISCAS), May 2007

Research Interest

- Body Sensor Network System and Wearable Computer System 

Education

2008. 8     M.S. in EE, Korea Advanced Institute of Science and Technology

2004. 2     B.S. in EE, Korea Advanced Institute of Science and Technology

2002. 2     Seoul Science High School

BIOGRAPHY

- International Journal Papers

Electrical Characterization of Screen-Printed Circuits on the Fabric 

Yongsang Kim, Hyejung Kim, and Hoi-Jun Yoo

IEEE Transactions on Advanced Packaging (TADVP), Vol.33, No.1, pp.196-205, Feb. 2010

Research Interest

-  Network-on-Chip Based SoC Design

-  Low Power DSP

Education

2009. 2     M.S. in EE, Korea Advanced Institute of Science and Technology

2007. 2     B.S. in EE, Korea Advanced Institute of Science and Technology

2003. 2     Hansung Science High School

BIOGRAPHY

- International Conference Papers

A 54GOPS 51.8mW Analog-Digital Mixed Mode Neural Perception Engine for Fast Object Detection

Minsu Kim, Joo-Young Kim, Seungjin Lee, Jinwook Oh, and Hoi-Jun Yoo 

IEEE Custom Integrated Circuits Conference (CICC), Sep. 2009

A 22.8GOPS 2.83mW Neuro-fuzzy Object Detection Engine for Fast Multi-object Recognition

Minsu Kim, Joo-Young Kim, Seungjin Lee, Jinwook Oh, and Hoi-Jun Yoo 

IEEE Symposium on VLSI Circuits (SoVC), June 2009

A 1.55ns 0.015 mm2 64-bit Quad Number Comparator

Minsu Kim, Joo-Young Kim and Hoi-Jun Yoo 

International Symposium on VLSI Design, Automation and Test(VLSI-DAT), April 2009

Education

2010. 8      M.S. Student in EE, Korea Advanced Institute of Science and Technology

2008. 2      B.S. in EE, Korea Advanced Institute of Science and Technology

2004. 2      Seoul Science High School

BIOGRAPHY

- International Conference Papers

An Energy-Efficient Dual Sampling SAR ADC with Reduced Capacitive DAC  

Binhee Kim, Long Yan, Jerald Yoo, Namjun Cho, and Hoi-Jun Yoo 

IEEE International Symposium on Circuits and Systems(ISCAS), May 2009

Education

2011. 2      M.S. in EE, Korea Advanced Institute of Science and Technology

2009. 2      B.S. in EE, Korea Advanced Institute of Science and Technology

2005. 2      Hansung Science High School

BIOGRAPHY

- International Conference Papers

A 22.4 mW Competitive Fuzzy Edge Detection Processor for Volume Rendering

Joonsoo Kwon, Minsu Kim, Jinwook Oh, and Hoi-Jun Yoo

IEEE International Symposium on Circuit and Systems(ISCAS), Jun. 2010

Research Interest

- Biomedical Processor Design 

Education

2015. 9 ~   Ph.D. Student in EE, Korea Advanced Institute of Science and Technology (KAIST)

2015. 8      M.S. in EE, Korea Advanced Institute of Science and Technology (KAIST)

2010. 8      B.S. in Mathematical Sciences, Korea Advanced Institute of Science and Technology (KAIST)

2005. 8      Korea Science Academy of KAIST

BIOGRAPHY

-

Research Interest

- Biomedical Processor Design

Education

2018. 9     M.S. in EE, Korea Advanced Institute of Science and Technology

2016. 8     B.S. Student in EE, Korea Advanced Insititue of Science and Technology

2008. 2     Seoul Science High School 

BIOGRAPHY

-

Research Interest

- Low power deep learning and intelligent vision SoC with memory architecture

Education

2019. 8      M.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2017. 8      B.S. in EE, Kyunghee University

2014. 2      Yushin High School

BIOGRAPHY

- International Journal Papers

Z-PIM: A Sparsity-Aware Processing-in-Memory Architecture With Fully Variable Weight Bit-Precision for Energy-Efficient Deep Neural Networks 

Ji-Hoon Kim, Juhyoung Lee, Jinsu Lee, Jaehoon Heo, and Joo-Young Kim

IEEE Journal of Solid-State Circuits (JSSC), Early Access. 2020

An Ultra-low-power Mixed-mode Face Recognition Processor for Always-on User Authentication in Mobile Device 

Ji-Hoon Kim, Changhyeon Kim, Kwantae Kim, Juhyung Lee, Hoi-Jun Yoo, and Joo-Young Kim

Journal of Semiconductor Science and Technology (JSTS), Dec. 2020

- International Conference Papers

Z-PIM: An Energy-Efficient Sparsity-Aware Processing-In-Memory Architecture with Fully-Variable Weight Precision 

Ji-Hoon Kim, Juhyoung Lee, Jinsu Lee, Hoi-Jun Yoo and Joo-Young Kim

Symposium on VLSI Circuits (SoVC), Jun. 2020

An Ultra-Low-Power Analog-Digital Hybrid CNN Face Recognition Processor Integrated with a CIS for Always-on Mobile Devices

Ji-Hoon Kim, Changhyeon Kim, Kwantae Kim and Hoi-Jun Yoo

IEEE International Symposium on Circuit and Systems (ISCAS), May. 2019

Research Interest

- Biomedical Sensor Front-end

Education

2020. 2     M.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2018. 2      B.S. in EE, Korea University

2014. 2      Busan Science High School

BIOGRAPHY

- International Journal Papers 

FlashMAC: A Time-Frequency Hybrid MAC Architecture With Variable Latency-Aware Scheduling for TinyML Systems 

Surin Gweon, Sanghoon Kang, Kwantae Kim, and Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), Jul. 2022

- International Conference Papers

FlashMAC: An Energy-Efficient Analog-Digital Hybrid MAC with Variable Latency-Aware Scheduling

Surin Gweon, Sanghoon Kang, Donghyeon Han, Kyoung-Rog Lee, Kwantae Kim, Hoi-Jun Yoo

IEEE Asian Conference on Solid-State Circuits (ASSCC), Nov. 2021

93.8% Current Efficiency and 0.672 ns Transient Response Reconfigurable LDO for Wireless Sensor Network Systems

Surin Gweon, Jaehyuk Lee, Kwantae Kim, and Hoi-Jun Yoo

IEEE International Symposium on Circuit and Systems (ISCAS), May. 2019

Research Interest

- Multicore Processor Architecture 

- Deep Learning SoC

Education

2020. 8      M.S. Student in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2018. 7      B.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2013. 2      Gyeonggi Science High School

BIOGRAPHY

-- International Journal Papers

A 0.22–0.89 mW Low-Power and Highly-Secure Always-on Face Recognition Processor with Adversarial Attack Prevention 

Youngwoo Kim, Donghyeon Han, Changhyeon Kim, and Hoi-Jun Yoo

IEEE Transactions on Circuits and Systems II (TCAS-2), May. 2020

-- International Conference Papers

A 0.22–0.89 mW Low-Power and Highly-Secure Always-on Face Recognition Processor with Adversarial Attack Prevention 

Youngwoo Kim, Donghyeon Han, Changhyeon Kim, and Hoi-Jun Yoo

IEEE International Symposium on Circuit and Systems (ISCAS), Oct. 2020

Research Interest

- RISC-V SoC Platform

- Deep Learning SoC

Education

2021. 9 ~   Ph.D. Student in EE, Korea Advanced Insititue of Science and Technology (KAIST) 

2021. 8      M.S. in EE, Korea Advanced Insititue of Science and Technology (KAIST)

2019. 7      B.S. in EE, Fudan University 

2015. 7      Yanbian No.1 High School

Award

BIOGRAPHY

- International Journal P​apers

An Efficient Deep-Learning-Based Super-Resolution Accelerating SoC With Heterogeneous Accelerating and Hierarchical Cache 

Zhiyong Li, Sangjin Kim, Dongseok Im, Dongheon Han, and Hoi-Jun Yoo

IEEE Journal of Solid-State Circuits (JSSC), Dec. 2022

- International Conference Papers

An Energy-efficient High-quality FHD Super-resolution Mobile Accelerator SoC with Hybrid-precision and Energy-efficient Cache Subsystem

Zhiyong Li, Sangjin Kim, Dongseok Im, Donghyeon Han, and Hoi-Jun Yoo

IEEE Symposium on High Performance Chips (HOT Chips), Aug. 2022

An 0.92 mJ/frame High-quality FHD Super-resolution Mobile Accelerator SoC with Hybrid-precision and Energy-efficient Cache 

Zhiyong Li, Sangjin Kim, Dongseok Im, Donghyeon Han, and Hoi-Jun Yoo

IEEE Custom Integrated Circuits Conference (CICC), Apr. 2022

A 3.6 TOPS/W Hybrid FP-FXP Deep Learning Processor with Outlier Compensation for Image-to-Image Application 

Zhiyong Li, Dongseok Im, Jinsu Lee, and Hoi-jun Yoo 

IEEE International Symposium on Circuit and Systems (ISCAS), May. 2021

Research Interest

- Processing-In-Memory (PIM)

- Deep Learning Processor

- Neuromorphic

Education

2022.3 ~   M.S. Student in EE, Korea Advanced Institute of Science and Technology (KAIST) 

2022.2      B.S in EE, Sungkyunkwan University

2015.2      Daeryun High School

BIOGRAPHY

- International Conference Papers

A 15.9 mW 96.5 fps Memory-Efficient 3D Reconstruction Processor with Dilation-based TSDF Fusion and Block-Projection Cache System

Hankyul Kwon, Gwangtae Park, Junha Ryu, Wooyoung Jo, and Hoi-Jun Yoo

IEEE International Symposium on Circuits and Systems (ISCAS), May. 2023

Research Interest

- Deep Learning SoC Design

- Processing-In-Memory (PIM)

Education

2022. 3 ~   M.S. Student in EE, Korea Advanced Insititue of Science and Technology (KAIST) 

2022. 2      B.S. in EE, Korea University

2016. 2      Ulsan Science High School

Award

BIOGRAPHY

- International Journal Papers 

A 92 fps and 2.56 mJ/frame Computing-in-Memory-based Human Pose Estimation Accelerator with Resource-Efficient Macro for Mobile Devices 

Beomseok Kwon, Zhiyong Li, Sangjin Kim, Wooyoung Jo, and Hoi-Jun Yoo

IEEE Transactions on Circuits and Systems II (TCAS-II), Mar. 2023

- International Conference Papers

A 92 fps and 2.56 mJ/Frame Computing-in-Memory-Based Human Pose Estimation Accelerator with Resource-Efficient Macro for Mobile Devices

Beomseok Kwon, Zhiyong Li, Sangjin Kim, Wooyoung Jo, and Hoi-Jun Yoo

IEEE International Symposium on Circuits and Systems (ISCAS), May. 2023

Research Interest

- Processing-In-Memory (PIM)

- Deep Learning SoC

- AI Algorithm

Education

2022.8~    M.S. Student in EE, Korea Advanced Institute of Science and Technology (KAIST) 

2022.7      B.S in Microelectronics, Sichuan University 

2018.7      Chongqing Hechuan High School

BIOGRAPHY

-- International Journal Papers 

An 2.31uJ/Inference Ultra-Low Power Always-on Event-Driven AI-IoT SoC with Switchable nvSRAM Compute-in-Memory Macro

Haoyang Sang, Wenao Xie, Gwangtae Park, and Hoi-Jun Yoo

IEEE Transactions on Circuits and Systems II (TCAS-II), Mar. 2024

 

-- International Conference Papers

An 2.31uJ/Inference Ultra-Low Power Always-on Event-Driven AI-IoT SoC with Switchable nvSRAM Compute-in-Memory Macro

Haoyang Sang, Wenao Xie, Gwangtae Park, and Hoi-Jun Yoo

IEEE International Symposium on Circuits and Systems (ISCAS), May. 2024

Research Interest

- Processing-In-Memory (PIM)

- Deep Learning Processor

- Neuromorphic

Education

2023.3~    M.S. Student in EE, Korea Advanced Institute of Science and Technology (KAIST) 

2023.2      B.S in EE, Sungkyunkwan University 

2016.2      Buram High School

BIOGRAPHY

-- International Journal Papers 

A 8.81 TFLOPS/W Deep-Reinforcement-Learning Accelerator with Delta-Based Weight Sharing and Block-Mantissa Reconfigurable PE Array

Sanghyuk An, Junha Ryu, Gwangtae Park, and Hoi-Jun Yoo

IEEE Transactions on Circuits and Systems II (TCAS-II), Mar. 2024

--- International Conference Papers

EnTADRL : Deep Reinforcement Learning System-on-Chip for End-to-End Training Acceleration 

Jingu Lee*, Sanghyuk An*, Jongjun Park, Jiwon Choi, Haoyang Sang, Sangwoo Ha, Sangjin Kim and Hoi-Jun Yoo

IEEE Asian Solid-State Circuits Conference (A-SSCC), Nov. 2024

A 8.81 TFLOPS/W Deep-Reinforcement-Learning Accelerator with Delta-Based Weight Sharing and Block-Mantissa Reconfigurable Pe Array

Sanghyuk An, Junha Ryu, Gwangtae Park, and Hoi-Jun Yoo

IEEE International Symposium on Circuits and Systems (ISCAS), May. 2024

Research Interest

- Processing-In-Memory (PIM)

- Deep Learning Processor

- Neuromorphic

Education

2023.9~    M.S. Student in Graduate School of AI Semiconductor, Korea Advanced Institute of Science and Technology (KAIST) 

2023.2      B.S in EE, Hanyang University

2017.2      Cheongwon High School

BIOGRAPHY

- International Conference Papers

A 17.1 TOPS/W FP-INT Transformer Inference Accelerator with Sparsity Boosting and Output Importance-Aware Processing

Jeonggyu So, Seongyon Hong, Jiwon Choi, Wooyoung Jo, Sangjin Kim, Hoi-Jun Yoo, Donghyeon Han

IEEE International Symposium on Circuits and Systems (ISCAS), May. 2025 

Research Interest

- Processing-In-Memory (PIM)

- Deep Learning Processor

- Neuromorphic

Education

2024.3~    M.S. Student in Graduate School of AI Semiconductor, Korea Advanced Institute of Science and Technology (KAIST)

2024.2      B.S in EE, Kookmin University

2019.2      Bijeon high school

BIOGRAPHY

- International Conference Papers

A 65.1 TOPS/W Digital CIM Processor for Ultra-Low-Bit Transformers with Multiplexer-Based Adder and Scaling Factor-Based Reordering

Nayeong Lee, Sangyeob Kim, Seongyon Hong, Jiwon Choi, and Hoi-Jun Yoo

IEEE International Symposium on Circuits and Systems (ISCAS), May. 2025 

Research Interest

- Processing-In-Memory (PIM)

- Deep Learning Processor

Education

2024.3~    M.S. Student in Graduate School of AI Semiconductor, Korea Advanced Institute of Science and Technology (KAIST)

2018.3~    DRAM Design Team, Samsung Electronics Co., Ltd

2018.2      B.S. in EE, Sogang University

2011.2      Seocho High School

BIOGRAPHY

- International Journal Papers

An 85.7 TOPS/W Analog-digital Combined In-memory Computing Accelerator for Mixed-precision Deep Neural Networks

Byeongcheol Kim, Wooyoung Jo, Sangjin Kim, Soyeon Um and Hoi-Jun Yoo

IEIE Journal of Semiconductor Technology and Science (JSTS), Aug. 2025

- International Conference Papers

A 4.21 TFLOPS/W Memory-Efficient LLM Inference Accelerator with Bit-Layered Non-Uniform Quantization

Byeongcheol Kim, Sangjin Kim, Sangwoo Ha, Soyeon Um, Kyomin Sohn, Hoi-Jun Yoo

IEEE International Symposium on Circuits and Systems (ISCAS), May. 2025 

Research Interest

- Processing-In-Memory (PIM)

- Deep Learning Processor

- Neuromorphic

Education

2024.3~    M.S. Student in Graduate School of AI Semiconductor, Korea Advanced Institute of Science and Technology (KAIST)

2024.2      B.S in EE, Sungkyunkwan University

2017.2      Daejeon Daeseong High School

BIOGRAPHY

- International Conference Papers

A 9.6 TOPS/W Vision Transformer Processor with Hierarchical Token Merging for Similarity-Driven Difference Computing

Jungjun Oh, Sangjin Kim, Jiwon Choi, Byeongcheol Kim, and Hoi-Jun Yoo

IEEE International Symposium on Circuits and Systems (ISCAS), May. 2025 

- International Jounal Papers

An Energy-Efficient High Resolution Vision Transformer Processor Exploiting Token Similarity Beyond Token Merging

Jungjun Oh, Sangjin Kim, Jiwon Choi, Junha Ryu, Byeongcheol Kim, Yuseon Choi and Hoi-Jun Yoo

IEEE Transactions on Very Large Scale Integration (VLSI) Systems (T.VLSI), Sep. 2025

Research Interest

- Processing-In-Memory (PIM)

- Deep Learning Processor

- Al Algorithm

- Neuromorphic

Education

2023.9~    M.S. Student in EE, Korea Advanced Institute of Science and Technology (KAIST) 

2023.8      B.S in EE, Korea Advanced Institute of Science and Technology (KAIST)

2018.6      No.1 Shymkent Bilim-Innovation High School

BIOGRAPHY