semiconductorsystem lab

|  Introduction  |  People  |   Publications  |  Project  |  Resource  |  Link  |  Contact us  |

Our research efforts in the BONE are unified by the theme of
realizing new Network-on-Chip (NoC) technology through implementation.

KAIST 'Carrion Tower'
on the surface of the Duck Pond

Last update: 2008/10/28

     - NEWS -

• ISSCC 2008:
  " A 125GOPS 583mW Network-on-Chip Based Parallel Processor with Bio-inspired Visual Attention Engine "
  Demo Video: Object Memorize & Search for Intelligent Robot, click!
  
  
• ISSCC 2009:
  " A 201.4GOPS 496mW Real-Time Multi-Object Recognition Processor with Bio-Inspired Neural Perception Engine "
  Demo Video: Visual Perception & Real-time Mutli-object Recognition, click!
  
  

  MAJOR RESEARCH PROJECTS

PROTONE
The first Prototype
of BONE

- Star Toplogy
- Plesiocronous Comm.
- Serialization
- Off-Chip Gateway

@ ISSCC 2003

Slim-Spider
Low-Power NoC for Multimeida SoC

- Multiprocessors
- Small-swing Link
- Patial activation Tech.
- Serial coding (ICCAD04)
- Frequency Scaling

@ ISSCC 2004

FONE
Flexible NOC Platform

- NoC Evaluation System
- Adaptive Bandwidth
  Control (ISCAS05)
- Traffic Monitor
  

@ ISCAS 2005

IIS
Intelligent Interconnection System

- Serial Wave-Front-Train
- Adaptive bandwidth ctrl.
- Programmable delay   synchronizer
- Adaptive Circuit / Packet   switching mode
  

@ VLSI 2005

RoboNoC

- MP-SoC for Object Recognition
- Memory-Centric NoC
- 10 Processing Elements, ARM
  8 VIP Memories
- 81.6GOPS Peak Performance

@ CICC 2007

RoboNoC2

- 125GOPS NoC-based Parallel
  Processor
- Visual Attention Controlled
  Object Recognition
- Reconfigurable SIMD/MIMD
  Architecture
- Dual-channel Low-latency
  Crossbar Switch
- Adaptive Circuit & Packet
  Switching

@ ISSCC 2008